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公开(公告)号:EP2023489B1
公开(公告)日:2011-02-09
申请号:EP07113381.3
申请日:2007-07-27
发明人: Dedic, Ian Juso , Walker, Darren
IPC分类号: H03M1/08 , H03K17/041
CPC分类号: H03M1/0863 , H03K17/04106 , H03K17/145 , H03M1/742
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公开(公告)号:EP2019487B1
公开(公告)日:2013-05-01
申请号:EP07113380.5
申请日:2007-07-27
发明人: Walker, Darren , Dedic, Ian Juso
CPC分类号: H03K17/16 , H03M1/0614 , H03M1/0624 , H03M1/0663 , H03M1/747
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公开(公告)号:EP2023487B1
公开(公告)日:2010-09-15
申请号:EP07113379.7
申请日:2007-07-27
发明人: Dedic, Ian Juso , Walker, Darren
CPC分类号: H03M1/0604 , H03K17/04123 , H03K17/04166 , H03K17/145 , H03K17/18 , H03K17/6871 , H03K2217/0018 , H03M1/742
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公开(公告)号:EP2237425B1
公开(公告)日:2012-05-09
申请号:EP10164671.9
申请日:2007-07-27
发明人: Dedic, Ian Juso , Walker, Darren
IPC分类号: H03M1/08 , H03K17/041 , H03K17/16
CPC分类号: H03M1/0863 , H03K17/04106 , H03K17/145 , H03M1/742
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公开(公告)号:EP2237425A1
公开(公告)日:2010-10-06
申请号:EP10164671.9
申请日:2007-07-27
发明人: Dedic, Ian Juso , Walker, Darren
IPC分类号: H03M1/08 , H03K17/041 , H03K17/16
CPC分类号: H03M1/0863 , H03K17/04106 , H03K17/145 , H03M1/742
摘要: Current switching circuitry comprising: first and second connection nodes (CN1, CN2) through which first and second controllable currents pass respectively when the circuitry is in use; switching means (S1, S2) for changing the respective magnitudes of the first and second controllable currents in dependence upon a switching signal; and current conveyor means (30) connected between the first and second connection nodes and first and second output nodes of the circuitry for conveying the first controllable current between the first connection node and the first output node and for conveying the second controllable current between the second connection node and the second output node, the current conveyor means comprising first and second cascode transistors each having first and second current-path terminals and a control terminal, the first and second current-path terminals of the first cascode transistor being connected to the first output node and first connection node, respectively, and the first and second current-path terminals of the second cascode transistor being connected to the second output node and second connection node, respectively, wherein the current conveyor means comprises: adjusting means operable to adjust a potential of the control terminal of each of the first and second cascode transistors so as to compensate for variations in a potential difference between the control terminal and the second current-path terminal of the transistor concerned arising from variations in a potential difference between the first and second current-path terminals of the transistor concerned.
摘要翻译: 电流切换电路包括:第一和第二连接节点(CN1,CN2),当电路正在使用时,第一和第二连接节点分别通过第一和第二可控电流通过; 用于根据切换信号改变第一和第二可控电流的各自的大小的开关装置(S1,S2); 以及连接在第一和第二连接节点之间的电流传送装置(30)以及电路的第一和第二输出节点,用于在第一连接节点和第一输出节点之间传送第一可控电流,并且用于在第二连接节点和第二连接节点之间传送第二可控电流 连接节点和第二输出节点,当前传输装置包括每个具有第一和第二电流路径端子的第一和第二共源共栅晶体管和控制端子,第一共源共栅晶体管的第一和第二电流路径端子连接到第一 输出节点和第一连接节点,并且第二共源共栅晶体管的第一和第二电流路径端子分别连接到第二输出节点和第二连接节点,其中当前传输装置包括:调节装置,可操作以调整 第一和第二共源共栅晶体管中的每一个的控制端子的电位 以便补偿由所述晶体管的第一和第二电流路径端子之间的电位差的变化引起的晶体管的控制端子和第二电流通路端子之间的电位差的变化。
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