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    Time domain component multiplexing
    3.
    发明公开
    Time domain component multiplexing 失效
    时域组件复用

    公开(公告)号：EP0655670A1

    公开(公告)日：1995-05-31

    申请号：EP94116217.4

    申请日：1994-10-14

    申请人： International Business Machines Corporation

    发明人： Gersbach, John Edwin

    IPC分类号： G05F3/26 ,  H03M1/06 ,  H03M1/66

    CPC分类号： H03M1/0663 ,  H03K17/14 ,  H03K17/145 ,  H03M1/66

    摘要： An integrated circuit in which closer matching or tracking of critical components, both active and passive, is achieved by time domain multiplexing of these critical components. Time domain multiplexing means that each of the components to be matched is alternately and sequentially, electronically switched between selected positions in the circuit. This is accomplished by continuous electronic movement or rotation of the critical components into or out of selected circuit positions to average in the circuit output any inherent errors due to variations resulting from electrical and physical characteristics appearing in the components. This arrangement is particularly useful in compensating for variations induced by the process used to create the components.
    This time domain multiplexing is especially useful in analog circuits employing complementary metal on silicon (CMOS) transistors, both field effect and bipolar in which component tracking is required for quality operation.

    摘要翻译： 一种集成电路，通过这些关键组件的时域多路复用，可以实现主动和被动关键组件的更紧密匹配或跟踪。 时域多路复用意味着要匹配的每个组件是交替和顺序的，在电路中的选定位置之间进行电子切换。 这通过连续的电子移动或关键部件的旋转进入或移出选定的电路位置来实现，以平均在电路输出中由于由部件中出现的电和物理特性引起的变化而引起的任何固有误差。 这种安排在补偿用于创建组件的过程所引起的变化方面特别有用。 这种时域多路复用在采用互补金属硅（CMOS）晶体管的模拟电路中是特别有用的，它既是场效应又是双极性，其中质量操作需要元件跟踪。

    2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR USING A CHOPPER VOLTAGE REFERENCE
    4.
    发明授权
    2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR USING A CHOPPER VOLTAGE REFERENCE 有权
    采用斩波参考电压的开关电容Σ-Δ调制器的两阶段增益校准和标定方案

    公开(公告)号：EP2591555B1

    公开(公告)日：2018-03-07

    申请号：EP11700774.0

    申请日：2011-01-11

    申请人： Microchip Technology Incorporated

    发明人： QUIQUEMPOIX, Vincent ,  JOHNER, Yann ,  BELLINI, Gabriele

    IPC分类号： H03M3/00 ,  H03M1/06

    CPC分类号： H03M1/0663 ,  H03M1/0665 ,  H03M3/422 ,  H03M3/456 ,  H03M3/464

    摘要： A sigma-delta modulator has a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of switches to couple any capacitor pair to an input or reference signal; and a control unit controlling sampling through said switches to perform a charge transfer in two phases wherein any capacitor pair can be selected to be assigned to the input or reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically, and wherein a DAC output value and a reference offset state define switching sequences wherein each switching sequence independently rotates said capacitor pairs and wherein at least one switching sequence is selected depending on a current DAC output value and a current reference offset state.

    Potentiometric DAC having improved ratiometric output voltage stability
    7.
    发明公开
    Potentiometric DAC having improved ratiometric output voltage stability 审中-公开
    电子邮件地址

    公开(公告)号：EP1098441A2

    公开(公告)日：2001-05-09

    申请号：EP00309743.3

    申请日：2000-11-03

    申请人： Texas Instruments Incorporated

    发明人： Corkum, David L.

    IPC分类号： H03M1/06

    CPC分类号： H03M1/0663 ,  H03M1/765

    摘要： A potentiometric digital to analog converter includes switches to electrically connect a string of n resistors between two voltage supplies to charge a first capacitor (C 1 ) through a first tap and store the charge and then to reverse the electrical connections of the string to the two power supplies to charge a second capacitor (C 2 ) through a second tap connected at an inverse location symmetrical about the average voltage of the voltages at the supply connectivity switches and store the charge of the second capacitor. The voltage (V A , V B ) on the two capacitors is then averaged to provide a ratiometric output voltage which is insensitive to the drift of values of the string of resistors.

    摘要翻译： 电位数转换器包括用于在两个电压源之间电连接一组n个电阻器的开关，用于通过第一次抽头对第一电容器（C1）充电并存储电荷，然后将串的电连接反向到两个电源 用于通过连接在与供电连接开关处的电压的平均电压对称的反向位置处的第二抽头对第二电容器（C2）充电并存储第二电容器的电荷。 然后对两个电容器上的电压（VA，VB）进行平均，以提供对电阻串的值的漂移不敏感的比例输出电压。

    SENSOR DEVICE
    8.
    发明公开
    SENSOR DEVICE 审中-公开
    传感器装置

    公开(公告)号：EP2471176A2

    公开(公告)日：2012-07-04

    申请号：EP10771536.9

    申请日：2010-08-25

    申请人： Panasonic Corporation

    发明人： LAU, Choon How ,  KUMAHARA, Minoru

    IPC分类号： H03F3/393 ,  H03F3/45 ,  H03F3/387

    CPC分类号： H03F3/393 ,  H03F3/387 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2200/264 ,  H03F2200/78 ,  H03F2203/45138 ,  H03M1/0663 ,  H03M1/52

    摘要： A sensor device is provided with a voltage detection type sensor unit (20) for converting a physical quantity into a voltage value and outputting a voltage signal indicating the voltage value; a chopper amplifier unit (10) for generating a modulation signal by chopping the voltage signal output from the sensor unit with a predetermined chopping frequency, amplifying the modulation signal into an amplification signal, then demodulating the amplification signal and outputting it as an output signal; an integration unit (13) including an operational amplifier (14) for amplifying a voltage difference between a voltage at a non- inverting input terminal and a voltage at an inverting input terminal, an input resistor (Rl) connected to the inverting input terminal of the operational amplifier and a capacitor (Cl) connected between the inverting input terminal and an output terminal of the operational amplifier (14) and adapted to sample the output signal output from the chopper amplifier unit (10) at a predetermined sampling frequency and integrate the sampled output signal.

    2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR
    9.
    发明公开
    2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR 审中-公开
    两相和VERSTÄRKUNGSKALIBRIER-SKALIERSCHEMA控制的电容器Σ-Δ调制

    公开(公告)号：EP2454816A2

    公开(公告)日：2012-05-23

    申请号：EP10735390.6

    申请日：2010-07-15

    申请人： Microchip Technology Incorporated

    发明人： DEVAL, Philippe ,  QUIQUEMPOIX, Vincent

    IPC分类号： H03M3/00 ,  H03M1/06

    CPC分类号： H03M1/0663 ,  H03M1/0665 ,  H03M3/422 ,  H03M3/456 ,  H03M3/464

    摘要： A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.

    Switching circuitry
    10.
    发明公开
    Switching circuitry 有权
    开关电路

    公开(公告)号：EP2019487A1

    公开(公告)日：2009-01-28

    申请号：EP07113380.5

    申请日：2007-07-27

    申请人： Fujitsu Ltd.

    发明人： Walker, Darren ,  Dedic, Ian Juso

    IPC分类号： H03K17/04 ,  H03M1/00

    CPC分类号： H03K17/16 ,  H03M1/0614 ,  H03M1/0624 ,  H03M1/0663 ,  H03M1/747

    摘要： Switch driver circuitry for driving a switching circuit, the circuitry being operable in a repeating sequence of n phases, where n ≥ 3, and comprising: a mask generator circuit connected for receiving one or more clock signals and operable to derive therefrom a set of n mask signals which differ in phase one from the next by 360/n°; and n driver circuits, each having a mask input node at which one of said n mask signals is received and a clock input node at which a clock signal is received, that clock signal having a preselected change during an active period of the received mask signal, and each said driver circuit also having a clock switch connected between the clock input node and an output node of the driver circuit and also having a switch controller operable to turn on the clock switch in advance of said preselected change.

    摘要翻译： 用于驱动开关电路的开关驱动器电路，该电路可以以n个相位的重复序列操作，其中n≥3，并且包括：掩码生成器电路，被连接用于接收一个或多个时钟信号并且可操作地从其中导出一组n个 屏蔽相位与下一相差360 / n°的信号; 和n个驱动器电路，每个驱动器电路具有接收所述n个屏蔽信号之一的屏蔽输入节点和接收时钟信号的时钟输入节点，所述n个驱动器电路在所接收的屏蔽信号的有效周期期间具有预选改变的时钟信号 并且每个所述驱动器电路还具有连接在时钟输入节点和驱动器电路的输出节点之间的时钟开关，并且还具有开关控制器，用于在所述预选改变之前开启时钟开关。