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    ANALOG-DIGITAL CONVERTER AND ANALOG-DIGITAL CONVERSION METHOD
    1.
    发明公开
    ANALOG-DIGITAL CONVERTER AND ANALOG-DIGITAL CONVERSION METHOD 审中-公开

    公开(公告)号：EP3240194A4

    公开(公告)日：2018-01-10

    申请号：EP15871831

    申请日：2015-11-26

    Applicant: HUAWEI TECH CO LTD

    Inventor： YANG JINDA ,  ZHOU LIREN

    IPC: H03M1/12 ,  G06F1/10 ,  H03M1/08

    CPC classification number: H03M1/747 ,  G06F1/10 ,  G10L15/12 ,  H03M1/0836 ,  H03M1/1205 ,  H03M1/1215 ,  H03M1/38 ,  H03M1/42 ,  H03M1/76

    Abstract: Embodiments of the present invention disclose an analog-digital converter and an analog-to-digital conversion method. The analog-digital converter includes: a clock generator, including M transmission gates, where the M transmission gates are configured to receive a first clock signal that is periodically sent and separately perform gating control on the first clock signal, so as to generate M second clock signals, M is an integer that is greater than or equal to 2, each period of the first clock signal comprises M clock pulses, a period of the M second clock signals is equal to the period of the first clock signal, each period of the M second clock signals includes one clock pulse of the M clock pulses; M ADC channels that are configured in a time interleaving manner, configured to receive one analog signal and separately perform, under the control of the M second clock signals, sampling and analog-to-digital conversion on the analog signal, so as to obtain M digital signals, where each ADC channel is corresponding to one clock signal of the M second clock signals; and an adder, configured to add the M digital signals together in a digital field, so as to obtain a digital output signal.

    Digital to analog converter with gradient error correction
    4.
    发明公开
    Digital to analog converter with gradient error correction 有权
    Digital-Analog-Wandler mit Korrektur des Gradientsfehlers

    公开(公告)号：EP2579463A1

    公开(公告)日：2013-04-10

    申请号：EP11183730.8

    申请日：2011-10-03

    Applicant: Research In Motion Limited

    Inventor： Muhammad, Khurram ,  Manku, Tajinder ,  Lebedev, Semyon

    IPC: H03M1/10 ,  H03M1/00 ,  H03M1/06 ,  H03M1/20 ,  H03M1/68 ,  H03M1/74 ,  H03M1/66 ,  H03M3/02 ,  H03M3/04 ,  H03M7/00

    CPC classification number: H03M1/1047 ,  H03M1/007 ,  H03M1/1042 ,  H03M1/661 ,  H03M1/68 ,  H03M1/685 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747 ,  H03M7/3026 ,  H03M7/3028

    Abstract: A digital-to-analog converter is disclosed. The converter includes a gradient correction module that generates a correction term based on a model of gradient error. The correction term is then applied to the signal path in the digital domain or applied to the output of the digital-to-analog converter in the analog domain. The model used to generate the correction term is based on a vertical gradient error in the array of current source elements, which may be modelled and calibrated using a second-order polynomial. Further, a digital-to-analog converter having a Nyquist DAC and an oversampled DAC is disclosed. When the oversampled DAC is enabled, the resolution of the Nyquist DAC may be increased while slowing the conversion rate.

    Abstract translation: 公开了一种数模转换器。 该转换器包括梯度校正模块，该梯度校正模块基于梯度误差的模型产生校正项。 然后将校正项应用于数字域中的信号路径或应用于模拟域中的数模转换器的输出。 用于产生校正项的模型基于当前源元素阵列中的垂直梯度误差，其可以使用二阶多项式来建模和校准。 此外，公开了具有奈奎斯特DAC和过采样DAC的数模转换器。 当使能过采样DAC时，可能会增加奈奎斯特DAC的分辨率，同时降低转换速率。

    Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC
    5.
    发明公开
    Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC 有权
    用于RF-DAC的改善幅度分辨率的集成电路，通信单元和方法

    公开(公告)号：EP2383893A3

    公开(公告)日：2013-01-23

    申请号：EP11003163.0

    申请日：2011-04-14

    Applicant: MediaTek Singapore Pte Ltd.

    Inventor： Staszewski, Robert Bogdan ,  Park, Min

    IPC: H03M1/68 ,  H03F3/217 ,  H03M1/74 ,  H03M1/82

    CPC classification number: H03K7/08 ,  H03F3/2176 ,  H03M1/68 ,  H03M1/747 ,  H03M1/822 ,  H04B14/026

    Abstract: An integrated circuit includes a digitally-controlled power generation stage (3324) for converting an input signal to a radio frequency carrier, the digitally-controlled power generation stage (3324) comprising a plurality of selectable switching devices capable of adjusting an envelope of the radio frequency carrier; and a pulse width modulator generator (1302, 1508) arranged to generate a pulse width modulator control signal and operably coupleable to the plurality of selectable switching devices of the digitally-controlled power generation stage (3324). The pulse width modulator generator (1302, 1508) inputs the pulse width modulator control signal to a subset of the plurality of the selectable switching devices such that a pulse width modulator signal adjusts the envelope radio frequency carrier output from the digitally-controlled power generation stage (3324).

    Current steering digital-analog converter particularly insensitive to packaging stresses
    6.
    发明公开
    Current steering digital-analog converter particularly insensitive to packaging stresses 有权
    Stromgesteuerter数字模拟Wandler besonders unempfindlichgegenüberGehäusespannungen

    公开(公告)号：EP2026467A1

    公开(公告)日：2009-02-18

    申请号：EP07425478.0

    申请日：2007-07-30

    Applicant: STMicroelectronics S.r.l.

    Inventor： Confalonieri, Pierangelo ,  Zamprogno, Marco ,  Martignone, Riccardo

    IPC: H03M1/06

    CPC classification number: H03M1/0648 ,  H03M1/687 ,  H03M1/747

    Abstract: A current steering digital-analog converter (1) for converting a digital code (In-cod) into an analog signal (Vout) is described. The converter comprises:
    - a substrate of semiconductor material;
    - an array (2) of current generators (MD0, MD1, M1-M15) integrated in the substrate;
    - a common summation node (NC1) and switching means (3) controllable on the basis of the digital code for connecting/disconnecting the current generators (MD0, MD1, M1-M15) to/from the common summation node (NC1).
    The current generators (MD0, MD1, M1-M15) are such as to provide the common summation node (NC1) with currents having a multiple value according to a power of two compared to a unit current value provided to the summation node by a current generator (MD0) of the array (2) of generators (MD0, MD1, M1-M15).
    The current generator (MD0) is divided into a base number of modular current generation elements in parallel to one another at least equal to two.

    Abstract translation: 描述用于将数字代码（In-cod）转换为模拟信号（Vout）的电流转向数模转换器（1）。 该转换器包括： - 半导体材料的衬底; - 集成在基板中的电流发生器（MD0，MD1，M1-M15）的阵列（2） - 根据用于将电流发生器（MD0，MD1，M1-M15）与公共求和节点（NC1）连接/断开的数字代码可控的公共求和节点（NC1）和切换装置（3）。 电流发生器（MD0，MD1，M1-M15）的目的是为了提供公共求和节点（NC1），该电流具有与通过电流提供给求和节点的单位电流值相比的两倍的功率的多个值 发生器（2）的发生器（MD0）（MD0，MD1，M1-M15）。 电流发生器（MD0）被分成至少等于2的彼此并联的基本数量的模块化电流产生元件。

    Method and system for digital to analog conversion using multi-purpose current summation
    9.
    发明公开
    Method and system for digital to analog conversion using multi-purpose current summation 有权
    Verfahren und System zur Digital-Analog-Wandlung unter Anwendung eines Mehrzweckstromsummierers

    公开(公告)号：EP1748564A1

    公开(公告)日：2007-01-31

    申请号：EP05106922.7

    申请日：2005-07-27

    Applicant: Agilent Technologies, Inc.

    Inventor： Rivoir, Jochen

    IPC: H03M1/66 ,  H03M3/00

    CPC classification number: H03M1/005 ,  H03M1/007 ,  H03M1/687 ,  H03M1/747 ,  H03M3/504

    Abstract: The invention relates to a method and a corresponding system for converting a digital signal to an analog signal (50), said method using a plurality of signal sources (20), preferably current sources (56), at least two of said signal sources (20) being equal output signal magnitude sources (20), said method comprising the steps of: controlling said equal output signal magnitude sources (20) by a logic unit, providing a digital input signal to said logic unit, said digital input signal being derived from said digital signal to be converted, and summing the outputs of said equal output signal magnitude sources (20) to contribute to said analog signal (50).

    Abstract translation: 本发明涉及一种用于将数字信号转换为模拟信号（50）的方法和相应的系统，所述方法使用多个信号源（20），最好是电流源（56），至少两个所述信号源（ 20）是相等的输出信号幅度源（20），所述方法包括以下步骤：通过逻辑单元控制所述等输出信号幅度源（20），向所述逻辑单元提供数字输入信号，导出所述数字输入信号 从所述待转换的数字信号中提取所述等输出信号幅度源（20）的输出，以对所述模拟信号（50）贡献。

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