AC motor control apparatus and control apparatus of electric rolling stock using the same
    2.
    发明公开
    AC motor control apparatus and control apparatus of electric rolling stock using the same 失效
    控制器,用于交流电动机和控制单元,用于将同一使用电动车辆。

    公开(公告)号:EP0536569A2

    公开(公告)日:1993-04-14

    申请号:EP92115826.7

    申请日:1992-09-16

    IPC分类号: H02P7/63 H02M7/527 B60L9/16

    摘要: There is provided a control apparatus of an AC motor (2) capable of performing stable torque control even over the entire running region of the AC motor. Structurally, a feedback control system (9, 8) for controlling the magnitude of motor primary current, a feedback control system (8, 17) for controlling the exciting component of motor primary current and a feedback control system (8, 18) for controlling the torque component of motor primary current are provided. Torque control is effected by a vector control system (4, 5, 6, 7, 8, 9) in the low speed running region and torque control is effected by a slip frequency control system (16, 10, 19, 20, 21, 22, 23) in the high speed running region, so that torque can be controlled excellently over the entire running region.

    摘要翻译: 提供了一种交流电机(2),其能够即使在AC电动机的整个区域的运行进行稳定的转矩控制的控制装置。 在结构上,一个反馈控制系统(9,8),用于控制电动机的初级电流,反馈控制系统(8,17)的大小来控制马达初级电流的励磁分量和反馈控制系统(8,18),用于控制 设置在电动机初级电流的转矩分量。 转矩控制是由一矢量控制系统(4,5,6,7,8,9)的运行区域和转矩控制是由转差频率控制系统(16,10,19,20,21实现的低速进行, 在高速行驶区域22,23),所以没有扭矩能够很好地在整个运行区域来控制。

    Inverter arrangement and AC motor driving system
    3.
    发明公开
    Inverter arrangement and AC motor driving system 失效
    Wechselrichteranordnung und AnsteuersystemfürWechselstrommotor。

    公开(公告)号:EP0512531A2

    公开(公告)日:1992-11-11

    申请号:EP92107689.9

    申请日:1992-05-07

    IPC分类号: H02M7/527 B60L9/22

    摘要: In a multi series pulse width modulation inverter arrangement, an inverter arrangement which can continue the inverter operation, in particular, by preventing an overcurrent caused by an erroneous firing of a switching element therein is provided. The multi series inverter arrangement is constituted to be operative in three level mode and in two level mode. Even when an erroneous firing thereof due to noise is generated, the operation of the inverter unit (4) can be continued, the overcurrent due to the erroneous firing is eliminated, the present inverter arrangement can be used under a severe noise environment and outputs an AC output having a small amount of higher harmonics, moreover when the inverter arrangement is operating under a three level mode in a low efficiency region, the operating mode of the inverter arrangement is positively switched from the three level mode to the two level mode, thereby the operating efficiency of the inverter arrangement is enhanced.

    摘要翻译: 在多串联脉宽调制逆变器装置中,提供了一种能够继续逆变器操作的逆变器装置,特别是通过防止由其中的开关元件的错误点火引起的过电流。 多串联逆变器装置构成为在三电平模式和二电平模式下工作。 即使当由于噪声而产生其错误的点火时,逆变器单元(4)的操作也可以继续,由于消除了由于错误的点火引起的过电流,本逆变器装置可以在恶劣的环境下使用并输出 交流输出具有少量的高次谐波,而且当逆变器装置在三电平模式下工作在低效率区域时,逆变器装置的工作模式从三电平模式正向切换到二电平模式 提高了逆变器装置的运行效率。

    A virtual storage data processing system
    5.
    发明公开
    A virtual storage data processing system 失效
    数据处理系统,虚拟内存。

    公开(公告)号:EP0052370A2

    公开(公告)日:1982-05-26

    申请号:EP81109719.5

    申请日:1981-11-16

    IPC分类号: G06F12/08 G06F13/00

    摘要: A virtual storage data processing system having an address translation unit (75) shared by a plurality of processors, located in a memory control unit (12) connected to a main memory (10) is disclosed. One of the plurality of processors is a job processor (40) which accesses the main memory with a virtual address to execute an instruction and includes a cache memory (41, 42) which is accessed with a virtual address. One of the plurality of processors is a file processor, (22) which accesses the main memory with a virtual address to transfer data between the main memory and an external memory (20). The cache memory receives the virtual address when the file processor writes to the main memory and if it contains a data block corresponding to the virtual address, it invalidates the corresponding data block. The address translation unit translates the address differently for the access from the file processor and the accesses from other processors.