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公开(公告)号:EP0525375A2
公开(公告)日:1993-02-03
申请号:EP92110517.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
IPC分类号: G06F9/38
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: RISC-type microprocessor has a fixed struction lenght of 2 n bits, whilst the data use size is 2 m bits,where m is greater than or equal to n.
摘要翻译: RISC型微处理器的固定结构长度为2 n位,数据使用大小为2 m,m大于或等于n。
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公开(公告)号:EP0902361A2
公开(公告)日:1999-03-17
申请号:EP98120015.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki B-11, Hitachitennouueshataku , Watabe, Mitsuru
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2 n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
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公开(公告)号:EP0525375A3
公开(公告)日:1993-04-21
申请号:EP92110517.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
IPC分类号: G06F9/38
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: RISC-type microprocessor has a fixed struction lenght of 2 n bits, whilst the data use size is 2 m bits,where m is greater than or equal to n.
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公开(公告)号:EP0902358A2
公开(公告)日:1999-03-17
申请号:EP98120014.0
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki B-11, Hitachitennouueshataku , Watabe, Mitsuru
IPC分类号: G06F7/52
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2 n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
摘要翻译: 采用通用寄存器方法的微型计算机MCU能够使用效率低的系统成本具有小的程序容量或高程序存储器,同时具有简化指令解码的优点,如具有固定长度指令格式的RISC机器 通过采用小于馈送到指令执行装置的最大数据字的长度的2
个固定长度的指令格式。 编码分割的控制是通过注意码位执行的。 -
公开(公告)号:EP0525375B1
公开(公告)日:2001-11-28
申请号:EP92110517.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
IPC分类号: G06F9/38
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: RISC-type microprocessor has a fixed struction lenght of 2 bits, whilst the data use size is 2 bits,where m is greater than or equal to n.
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公开(公告)号:EP0902358A3
公开(公告)日:2002-01-02
申请号:EP98120014.0
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Noriko, Sawa , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
IPC分类号: G06F7/52
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: A circuit and method for performing signed integer division by repeated division processing, in which a new partial remainder is formed by subtracting (or adding) a divisor from (to) a dividend or a partial remainder in accordance with the sign of the dividend or the partial remainder and the sign of the divisor, and a quotient bit is formed on the basis of the sign of the partial remainder and the sign of the divisor, wherein a pre-processing step corrects the dividend by subtracting 1 from the dividend if it is negative, and a post-processing step corrects the quotient formed by the repeated division processing on the basis of its sign.
摘要翻译: RISC型微处理器的固定结构长度为2 n位,数据使用大小为2 m,m大于或等于n。
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公开(公告)号:EP0902361B1
公开(公告)日:2004-06-02
申请号:EP98120015.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: RISC-type microprocessor has a fixed struction lenght of 2 bits, whilst the data use size is 2 bits,where m is greater than or equal to n.
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公开(公告)号:EP0902361A3
公开(公告)日:2002-01-02
申请号:EP98120015.7
申请日:1992-06-22
发明人: Kawasaki, Shumpei , Sakakibara, Eiji , Fukada, Kaoru , Yamazaki, Takanaga , Akao, Yasushi , Baba, Shiro , Kihara, Toshimasa , Kurakazu, Keiichi , Tsukamoto, Takashi , Masumura, Shigeki , Tawara, Yasuhiro , Kashiwagi, Yugo , Fujita, Shuya , Ishida, Katsuhiko , Sawa, Noriko , Asano, Yoichi , Chaki, Hideaki , Sugawara, Tadahiko , Kainaga, Masahiro , Noguchi, Kouki , Watabe, Mitsuru
CPC分类号: G06F7/535 , G06F9/30 , G06F9/3001 , G06F9/30112 , G06F9/3013 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30163 , G06F9/30167 , G06F9/30181 , G06F9/30189 , G06F9/322 , G06F9/324 , G06F9/3557 , G06F9/3802 , G06F9/3814 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3867 , G06F2207/5352
摘要: A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2 n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
摘要翻译: 采用通用寄存器方法的微型计算机MCU能够具有小的程序容量或高程序存储器使用效率和低系统成本,同时享有如具有固定长度指令格式的RISC机器中的简化指令解码的优点 通过采用比输入指令执行装置的最大数据字的长度小的固定长度2n比特的指令格式, 编码部分的控制是通过记录码位来执行的。
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