THREE-LEVEL PULSE WIDTH MODULATION TECHNIQUE FOR REDUCING SEMICONDUCTOR SHORT CIRCUIT CONDUCTION LOSS

    公开(公告)号:EP3694096A1

    公开(公告)日:2020-08-12

    申请号:EP19215589.3

    申请日:2019-12-12

    IPC分类号: H02M7/487 H02M1/32

    摘要: A converter implementing a dual-reference three-level pulse width modulation (PWM) technique for constraining a midpoint duty cycle is provided. The converter includes a phase leg (240) that includes upper, mid-upper, mid-lower, and lower switches (242, 244, 246, 248). The upper, mid-upper, mid-lower, and lower switches are connected in series between direct current (DC) positive (128) and negative (132) leads, with an alternating current (AC) output lead connected at a junction of the mid-upper and mid-lower switches. The phase leg includes a first clamping diode (250) connected to the junction of the switch and mid-upper switches and connected to a DC midpoint lead and a second clamping diode (252) connected between the DC midpoint lead and connected to the junction of the mid-lower and lower switches. The converter is electrically coupled to and operatively associated with a controller to receive control signals to drive the converter to constrain the midpoint duty cycle between the DC midpoint and AC output leads.

    HARMONIC REGULATOR WITH LOOP DELAY COMPENSATION

    公开(公告)号:EP3700041A1

    公开(公告)日:2020-08-26

    申请号:EP19215800.4

    申请日:2019-12-12

    IPC分类号: H02J3/18 B64D41/00

    摘要: Embodiments of the invention provide for a system, method, and controller for operating a harmonic regulator with loop delay compensation. Some embodiments include receiving, at a controller, voltage feedback from a power system, and applying a harmonic regulator to each distortion frequency to be compensated. Embodiments also include applying a predetermined delay to an output of the harmonic regulator, scaling the delayed output and adding it to a power source voltage reference waveform, and providing condition power to a load, using the conditioned power source voltage reference waveform.

    DUAL FEEDER SYSTEMS HAVING CURRENT TRANSFORMERS

    公开(公告)号:EP3648131A1

    公开(公告)日:2020-05-06

    申请号:EP19206985.4

    申请日:2019-11-04

    IPC分类号: H01F38/28 G01R31/50

    摘要: A dual feeder circuit system (100) for supplying electrical power can include one or more feeder groups (101), each feeder having a first wire (103) and a second wire (105) connected between a source terminal (109) and a load terminal (111) to carry the same electrical signal on both wires. The system can include one or more current transformers (107) disposed on one or more of the feeder groups such that the current transformer is disposed around both the first wire and the second wire. The first wire can be passed directly through a first side of the current transformer to allow current to travel through the current transformer in a first direction, and the second wire can include a loop (117) and be passed through a second side of the current transformer to allow current to travel through the current transformer in an second direction opposite the first direction.