公开(公告)号：EP1938332A1

公开(公告)日：2008-07-02

申请号：EP06788135.9

申请日：2006-07-21

申请人： Hewlett-Packard Development Company, L.P.

发明人： SNIDER, Gregory S, ,  KUEKES, Philip J,

IPC分类号： G11C19/00 ,  G11C13/02

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C13/0023 ,  G11C19/00 ,  G11C2213/17 ,  G11C2213/77 ,  G11C2213/81

摘要： One embodiment of the present invention is a nanoscale shift register that can be used, in certain nanoscale and mixed-scale logic circuits, to distribute an input signal to individual nanowires (1011-1017) of the logic circuit. In a described embodiment, the nanoscale shift register includes two series of nanoscale latches (1030-1037), each series controlled by common latch-control signals. Internal latches of each series of latches (1030-1033) are alternatively interconnected with a previous lacth of the other series (1034-1037) and a next latch of the other series by two series of gates (1023, 1025, 1027, 1029, 1022,1024, 1026, 1028), each controlled by a gate signal line (1006 and 1004).

公开(公告)号：EP1979911A2

公开(公告)日：2008-10-15

申请号：EP07762918.6

申请日：2007-01-30

申请人： Hewlett-Packard Development Company, L.P.

发明人： ROBINETT, Warren ,  SNIDER, Gregory S, ,  STEWART, Duncan ,  STRAZNICKY, Joseph

IPC分类号： G11C8/10 ,  G11C13/02 ,  H03M7/02

CPC分类号： G11C8/10 ,  G11C13/0023 ,  H03M13/51

摘要： Various embodiments of the present invention are directed to demultiplexers that include tunneling resistor nanowire junctions, and to nanowire addressing methods for reliably addressing nanowire signal lines in nanoscale and mixed-scale demultiplexers. In one embodimentof the present invention, an encoder-demulriplexer comprises a number of input signal lines and an encoder (1304) that generates an n-bit-constant-weight-code code-word internal address (1320, 1506, 1704) for each different input address (1318, 1702) received on the input signal lines. The encoder-demultiplexer also includes n microscale signal lines (1306-1311) on which an n-bit-constant-weight-code code word internal address is out put by the encoder and a number of encoder-demultiplexer-addressed nanowire signal lines interconnected with the n microscale signal lines (1306-1311) via tunneling resistor junctions, the encoder-demultiplexer-addressed nanowire signal lines each associated with an n-bit-constant-weight-code code-word internal adress (1320, 1506, 1704).

摘要翻译： 本发明的各种实施例涉及包括隧道电阻器纳米线结的解复用器，并且涉及用于在纳米级和混合尺度解复用器中可靠地寻址纳米线信号线的纳米线寻址方法。 在本发明的一个实施例中，编码器 - 解复用器包括多个输入信号线和编码器（1304），编码器（1304）为每个输入信号线生成n位恒定加权码字内部地址（1320,1506,1704） 在输入信号线上接收不同的输入地址（1318,1702）。 编码器 - 解复用器还包括n个微型信号线（1306-1311），编码器输出n位恒定加权码字内部地址，并且编码器 - 解复用器寻址的纳米线信号线互连 与n个微米级信号线（1306-1311）经由隧道电阻器结，编码器 - 解复用器寻址的纳米线信号线均与n位恒定加权码码字内部地址（1320,1506,1704）相关联， 。

公开(公告)号：EP1938332B1

公开(公告)日：2011-10-19

申请号：EP06788135.9

申请日：2006-07-21

申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

发明人： SNIDER, Gregory S, ,  KUEKES, Philip J,

IPC分类号： G11C19/00 ,  G11C13/02

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C13/0023 ,  G11C19/00 ,  G11C2213/17 ,  G11C2213/77 ,  G11C2213/81

摘要： One embodiment of the present invention is a nanoscale shift register that can be used, in certain nanoscale and mixed-scale logic circuits, to distribute an input signal to individual nanowires (1011-1017) of the logic circuit. In a described embodiment, the nanoscale shift register includes two series of nanoscale latches (1030-1037), each series controlled by common latch-control signals. Internal latches of each series of latches (1030-1033) are alternatively interconnected with a previous lacth of the other series (1034-1037) and a next latch of the other series by two series of gates (1023, 1025, 1027, 1029, 1022,1024, 1026, 1028), each controlled by a gate signal line (1006 and 1004).

公开(公告)号：EP1979911B1

公开(公告)日：2011-08-03

申请号：EP07762918.6

申请日：2007-01-30

申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

发明人： ROBINETT, Warren ,  SNIDER, Gregory S, ,  STEWART, Duncan ,  STRAZNICKY, Joseph

IPC分类号： G11C8/10 ,  G11C13/02 ,  H03M7/02

CPC分类号： G11C8/10 ,  G11C13/0023 ,  H03M13/51

摘要： Various embodiments of the present invention are directed to demultiplexers that include tunneling resistor nanowire junctions, and to nanowire addressing methods for reliably addressing nanowire signal lines in nanoscale and mixed-scale demultiplexers. In one embodimentof the present invention, an encoder-demulriplexer comprises a number of input signal lines and an encoder (1304) that generates an n-bit-constant-weight-code code-word internal address (1320, 1506, 1704) for each different input address (1318, 1702) received on the input signal lines. The encoder-demultiplexer also includes n microscale signal lines (1306-1311) on which an n-bit-constant-weight-code code word internal address is out put by the encoder and a number of encoder-demultiplexer-addressed nanowire signal lines interconnected with the n microscale signal lines (1306-1311) via tunneling resistor junctions, the encoder-demultiplexer-addressed nanowire signal lines each associated with an n-bit-constant-weight-code code-word internal adress (1320, 1506, 1704).