摘要:
A method and apparatus for video signal format conversion are provided which can suppress picture quality deterioration by simple signal processing, and produce high-quality pictures with low cost. A motion compensation frame rate converter (2) detects a motion vector BV by using a block unit motion vector estimation block (5), and generates a pixel unit motion vector PV in mini-block units by using a pixel unit motion vector generator (6). A motion compensation interpolated frame generator (7) generates a compensation vector by using a motion compensation vector generator (10) on the basis of this PV, and generates motion compensation signals by using current and previous frame motion compensation signal generators (8) and (9). A motion compensation signal setter (11) produces a frame rate converted signal S4 by generating interpolated frame signals from the average value of both signals when the difference signal between the absolute values of both compensation signals is smaller than a threshold, or from a frame signal closer to an interpolation frame from the time point of view when it is larger than or equal to the threshold.
摘要:
A system conversion apparatus and method for image signals are disclosed, in which an interlaced scanning image signal S1 is converted into a progressive scanning image signal S2 by an IP converter (1), a block-based motion vector is searched for based on the progressive scanning image signal S2 by a block-based motion vector search unit (5), a motion vector with minimum motion estimation error determined for each mini-block using the block-based motion vector is assigned as a pixel-based motion vector in a mini-block by a pixel-based motion vector generator (6), and an interpolated frame of the image signal is generated using the pixel-based motion vector and a progressive scanning image signal sequence S4 higher in frame frequency is output by a motion compensative interpolated frame generator (7).
摘要:
A method and apparatus for video signal format conversion are provided which can suppress picture quality deterioration by simple signal processing, and produce high-quality pictures with low cost. A motion compensation frame rate converter (2) detects a motion vector BV by using a block unit motion vector estimation block (5), and generates a pixel unit motion vector PV in mini-block units by using a pixel unit motion vector generator (6). A motion compensation interpolated frame generator (7) generates a compensation vector by using a motion compensation vector generator (10) on the basis of this PV, and generates motion compensation signals by using current and previous frame motion compensation signal generators (8) and (9). A motion compensation signal setter (11) produces a frame rate converted signal S4 by generating interpolated frame signals from the average value of both signals when the difference signal between the absolute values of both compensation signals is smaller than a threshold, or from a frame signal closer to an interpolation frame from the time point of view when it is larger than or equal to the threshold.
摘要:
A system conversion apparatus and method for image signals are disclosed, in which an interlaced scanning image signal S1 is converted into a progressive scanning image signal S2 by an IP converter (1), a block-based motion vector is searched for based on the progressive scanning image signal S2 by a block-based motion vector search unit (5), a motion vector with minimum motion estimation error determined for each mini-block using the block-based motion vector is assigned as a pixel-based motion vector in a mini-block by a pixel-based motion vector generator (6), and an interpolated frame of the image signal is generated using the pixel-based motion vector and a progressive scanning image signal sequence S4 higher in frame frequency is output by a motion compensative interpolated frame generator (7).
摘要:
Herein disclosed is a semiconductor integrated circuit capable of executing processing operations using two-dimensional data in a high parallelism and at a high speed. The semiconductor integrated circuit comprises: a two-dimensional memory array (MAR); a parallel data transfer circuit (TRC) for transferring the data read out in parallel through data lines, in parallel to a processing circuit group by selecting the word lines of the two-dimensional memory array; and the processing circuit group (PE) for executing processing operations in parallel by using the data transferred from said parallel data transfer circuit. Each of the processing circuits can make access to the plurality of series word lines of said two-dimensional memory array and the data lines through the parallel data transfer circuit, and the data lines of the two-dimensional memory array, to which a plurality of adjoining processing circuits can make access, have an overlapped range. Since the data lines of the two-dimensional memory array, to which the adjoining processing circuits can make access, have an overlapped range, the convolution processing operations or the like can be ex ecuted in parallel for the two-dimensional data stored in the two-dimensional memory array.
摘要:
In order to carry out a format conversion or a scaling processing on a picture signal by a memory of small capacity, interlace scanning picture signals are converted into progressive scanning picture signals by interpolation by using an IP converter 1 and a multiple-scan converter 3. Scaling processing by expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing by expansion, compression, frame rate conversion, synchronisation and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction, and finally, colour space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.
摘要:
In order to carry out a format conversion or a scaling processing on a picture signal by a memory of small capacity, interlace scanning picture signals are converted into progressive scanning picture signals by interpolation by using an IP converter 1 and a multiple-scan converter 3. Scaling processing by expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing by expansion, compression, frame rate conversion, synchronisation and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction, and finally, colour space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.