公开(公告)号：EP0178670A3

公开(公告)日：1987-09-30

申请号：EP85113206

申请日：1985-10-17

Applicant: Honeywell Information Systems Inc.

Inventor： Joyce, Thomas F. ,  Kelly, Richard P.

IPC: G06F11/14

CPC classification number: G06F11/141 ,  G06F11/1008

Abstract: A method and apparatus for a microinstruction controlled unit to recover from a read error in reading microinstructions from a control store. The method provides for the overlapping of the execution of a current microinstruction while the next microinstruction is being addressed and read from the control store. Execution of the current microinstru- tion is begun before it is known whether or not it was read without error. The apparatus provides for aborting the execution of the current microinstruction with the read error and the next microinstruction. During the aborted execution of the next microinstruction, the current microinstruction is reread from the control store and then executed while the next microinstruction is being reread. The execution of microinstructions is aborted in a manner that does not alter the state of the microinstruction controlled unit beyond the point that would inhibit the re-execution of the aborted microinstructions.

公开(公告)号：EP0050434A3

公开(公告)日：1984-07-25

申请号：EP81304591

申请日：1981-10-05

Applicant: Honeywell Information Systems Inc.

Inventor： Holtey, Thomas O. ,  Noyes, Steven S. ,  Kelly, Richard P. ,  Raymond, James C.

IPC: H04L01/10 ,  G06F03/04

CPC classification number: H04L1/0083 ,  G06F13/4226

Abstract: A communication device comprises a microprocessor which feeds bytes to a universal synchronous receiver transmitter (USRT) 88. The USRT transmits the data serially, signal C2TXSO+. On an underrun (USRT empty before next byte in), the USRT transmits a sequence of flag bytes (01111110) and generates an underrun signal C2TXTXU+. This signal is fed to transmit underrun logic 92, where a shift register 350 generates a 1 signal which lasts long enough to convert the first two 0's in the flag byte sequence to 1's by OR gate 354. A sequence of 8 to 13 1's is therefore generated prior to the flag bytes, this 1 sequence indicating an underrun condition.

Abstract translation: 通信设备包括将字节馈送到通用同步接收机发射机（USRT）88的微处理器.USRT以串行方式发射数据，信号C2TXSO +。 在欠载（USRT在下一个字节之前为空）之前，USRT发送一系列标志字节（01111110），并生成欠载信号C2TXTXU +。 该信号被馈送到发送欠载逻辑92，其中移位寄存器350产生持续足够长的1信号，以将标志字节序列中的前两个0转换为或门354。因此，8到13 1的序列是 在标志字节之前产生，该1序列指示欠载条件。

公开(公告)号：EP0050434A2

公开(公告)日：1982-04-28

申请号：EP81304591.1

申请日：1981-10-05

Applicant: Honeywell Information Systems Inc.

Inventor： Holtey, Thomas O. ,  Noyes, Steven S. ,  Kelly, Richard P. ,  Raymond, James C.

IPC: H04L1/10 ,  G06F3/04

CPC classification number: H04L1/0083 ,  G06F13/4226

Abstract: A communication device comprises a microprocessor which feeds bytes to a universal synchronous receiver transmitter (USRT) 88. The USRT transmits the data serially, signal C2TXSO+. On an underrun (USRT empty before next byte in), the USRT transmits a sequence of flag bytes (01111110) and generates an underrun signal C2TXTXU+. This signal is fed to transmit underrun logic 92, where a shift register 350 generates a 1 signal which lasts long enough to convert the first two 0's in the flag byte sequence to 1's by OR gate 354. A sequence of 8 to 13 1's is therefore generated prior to the flag bytes, this 1 sequence indicating an underrun condition.

Abstract translation: 一种通信设备，包括一个微处理器，一个通用同步收发器（USRT）88. USRT串行传输数据，信号C2TXSO +馈送字节。 上的防钻撞（在下一字节之前USRT空），则发送USRT的标志字节（01111110）和基因率的序列防钻撞信号C2TXTXU +。 此信号被馈送到发送防钻撞逻辑92，其中的移位寄存器350分基因率1信号，该信号持续足够长的前两个0的在标志字节序列转换成栅极354 8〜13 1的序列中的一个的通过OR的因此 之前的标志字节产生，这一个序列指示欠载状况。