公开(公告)号：EP2070110A4

公开(公告)日：2012-01-25

申请号：EP07842398

申请日：2007-09-13

Applicant: IBM

Inventor： ANDERSON BRENT A ,  LUDWIG THOMAS ,  NOWAK EDWARD J

IPC: H01L21/336 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/785 ,  H01L29/41791 ,  H01L29/66613 ,  H01L29/66795 ,  H01L2029/7858

公开(公告)号：EP1935020A4

公开(公告)日：2009-08-12

申请号：EP06825028

申请日：2006-09-19

Applicant: IBM

Inventor： BEINTNER JOCHEN ,  LUDWIG THOMAS ,  NOWAK EDWARD J

IPC: H01L21/84 ,  H01L21/336 ,  H01L27/12 ,  H01L29/78

CPC classification number: H01L21/845 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/785

Abstract: A method, structure and alignment procedure, for forming a finFET. The method including, defining a first fin of the finFET with a first mask and defining a second fin of the finFET with a second mask. The structure including integral first and second fins of single-crystal semiconductor material and longitudinal axes of the first and second fins aligned in the same crystal direction but offset from each other. The alignment procedure including simultaneously aligning alignment marks on a gate mask to alignment targets formed separately by a first masked used to define the first fin and a second mask used to define the second fin.

公开(公告)号：EP1620891A4

公开(公告)日：2007-03-28

申请号：EP04707026

申请日：2004-01-30

Applicant: IBM

Inventor： RAINEY BETH ANN ,  NOWAK EDWARD J ,  ALLER INGO DR ,  KEINERT JOACHIM ,  LUDWIG THOMAS

IPC: H01L21/84 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/045 ,  H01L29/66795

Abstract: The present invention provides a FinFET device that has a first fin and a second fin. Each fin has a channel region and source and drain regions that extend from the channel region. The fins have different heights. The invention has a gate conductor positioned adjacent the fins. The gate conductor runs perpendicular to the fins and crosses the channel region of each of the first fin and second fin. The fins are parallel to one another. The ratio of the height of the first fin to the height of the second fin comprises a ratio of one to 2/3. The ratio is used to tune the performance of the transistor and determines the total channel width of the transistor.