公开(公告)号：EP4254197A1

公开(公告)日：2023-10-04

申请号：EP23156438.6

申请日：2023-02-14

申请人： INTEL Corporation

发明人： Merten, Matthew ,  Strong, Beeman ,  Cohen, Moshe ,  Yasin, Ahmad ,  Kleen, Andreas ,  Bratanov, Stanislav ,  Gopalakrishnan, Karthik ,  Schmid, Angela ,  Zhou, Grant

IPC分类号： G06F11/30 ,  G06F11/34 ,  G06F11/36

摘要： Techniques and mechanisms for configuring processor event-based sampling (PEBS) with a set of control registers. In an embodiment, a first control register of a processor is programmed to store a physical address of a location in a buffer which receives PEBS records. The first control register is further programmed or otherwise configured to store an indication of a size of the buffer. A second control register of the processor stores a physical address of a location in the buffer were a next PEBS record is to be stored. In another embodiment, the processor further comprises multiple control registers which variously configure PEBS generation on a per-counter basis.

公开(公告)号：EP4439306A1

公开(公告)日：2024-10-02

申请号：EP23213572.3

申请日：2023-12-01

申请人： INTEL Corporation

发明人： Cohen, Moshe ,  Yasin, Ahmad

IPC分类号： G06F11/34

CPC分类号： G06F11/3466 ,  G06F11/3476 ,  G06F11/348 ,  G06F11/3409

摘要： Techniques for snapshotting of performance monitoring are described. In an embodiment, an apparatus includes a plurality of performance monitoring hardware resources, hardware to capture a record of state data related to state of the apparatus in connection with an occurrence of an event, and storage to store a first indicator corresponding to at least a first performance monitoring hardware resource of the plurality of performance monitoring hardware resources and to enable the hardware to include, in the record, performance data from the first performance monitoring hardware resource.