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1.
公开(公告)号:EP4439641A1
公开(公告)日:2024-10-02
申请号:EP23216038.2
申请日:2023-12-12
申请人: Intel Corporation
IPC分类号: H01L21/768 , H01L21/02
CPC分类号: H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/0228 , H01L21/02304 , H01L21/76834 , H01L21/76843
摘要: A low-leakage oxide dielectric material with high elastic modulus is deposited directly upon an oxidizable feature with a polycyclic PE-ALD process that limits the formation of an oxide on the feature. A precursor of one or more constituents, such as silicon, may be deposited upon a workpiece during a deposition phase, and the absorbed precursor(s) may be oxidized during a first oxidation phase under more conservative conditions until a first film thickness is achieved. Subsequently, absorbed precursor(s) may be oxidized during a second oxidation phase under more aggressive conditions to arrive at a total film thickness. Transistor contact metal, which may provide local interconnection between source or drain terminals of multiple transistors, may maintain high electrical conductivity after being electrically insulated with such a low-leakage film.
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公开(公告)号:EP4109513A1
公开(公告)日:2022-12-28
申请号:EP22174496.4
申请日:2022-05-20
申请人: INTEL Corporation
发明人: GHANI, Tahir , HARAN, Mohit , PATEL, Reken , PURSEL, Sean , GUHA, Biswajeet , JAFFE, Jake , HASAN, Mohammad
IPC分类号: H01L21/8234 , H01L27/088 , H01L29/775
摘要: Integrated circuit structures having plugged metal gates, and methods of fabricating integrated circuit structures having plugged metal gates, are described. For example, an integrated circuit structure includes a fin (204) having a portion protruding above a shallow trench isolation (STI) structure (206). A gate dielectric material layer (208) is over the protruding portion of the fin and over the STI structure. A conductive gate layer is over the gate dielectric material layer. A conductive gate fill material is over the conductive gate layer. A dielectric gate plug (212) is laterally spaced apart from the fin, the dielectric gate plug on the STI structure. The gate dielectric material layer and the conductive gate layer are along a side of the dielectric gate plug, and the gate dielectric material layer is in direct contact with an entirety of the side of the dielectric gate plug.
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3.
公开(公告)号:EP4156258A1
公开(公告)日:2023-03-29
申请号:EP22197188.0
申请日:2022-09-22
申请人: INTEL Corporation
发明人: CHANDHOK, Manish , KARPOV, Elijah V. , HARAN, Mohit K. , PATEL, Reken , WALLACE, Charles H. , SINGH, Gurpreet , GSTREIN, Florian , HAN, Eungnak , ALAAN, Urusa , GULER, Leonard P. , NYHUS, Paul A.
IPC分类号: H01L23/528 , H01L29/78 , H01L23/485 , H01L21/768 , H01L23/532
摘要: Contact over active gate (COAG) structures with conductive trench contact taps are described. In an example, an integrated circuit structure includes a plurality of gate structures above a substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon. One of the plurality of conductive trench contact structures includes a conductive tap structure protruding through the corresponding trench insulating layer. An interlayer dielectric material is above the trench insulating layers and the gate insulating layers. A conductive structure is in direct contact with the conductive tap structure of the one of the plurality of conductive trench contact structures.
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公开(公告)号:EP3796370A1
公开(公告)日:2021-03-24
申请号:EP20181046.2
申请日:2020-06-19
申请人: INTEL Corporation
发明人: SCHENKER, Richard , HOURANI, Rami , GSTREIN, Florian , CHANDHOK, Manish , NYHUS, Paul , WARD, Curtis , WALLACE, Charles , GULER, Leonard , HARAN, Mohit , PATEL, Reken
IPC分类号: H01L21/768
摘要: Contact over active gate structure with metal oxide layers are described are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. A portion of one of the plurality of trench contact structures has a metal oxide layer thereon. An interlayer dielectric material is over the plurality of gate structures and over the plurality of conductive trench contact structures. An opening is in the interlayer dielectric material and in a gate insulating layer of a corresponding one of the plurality of gate structures. A conductive via is in the opening, the conductive via in direct contact with the corresponding one of the plurality of gate structures, and the conductive via on the metal oxide layer.
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5.
公开(公告)号:EP4163968A1
公开(公告)日:2023-04-12
申请号:EP22205431.4
申请日:2022-09-22
申请人: Intel Corporation
发明人: CHANDHOK, Manish , KARPOV, Elijah V. , HARAN, Mohit , PATEL, Reken , WALLACE, Charles H. , SINGH, Gurpreet , GSTREIN, Florian , HAN, Eungnak , ALAAN, Urusa , GULER, Leonard P. , NYHUS, Paul A.
IPC分类号: H01L23/528 , H01L29/78 , H01L23/485 , H01L21/768 , H01L23/532
摘要: Contact over active gate (COAG) structures with conductive trench contact taps are described. In an example, an integrated circuit structure includes a plurality of gate structures above a substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon. One of the plurality of conductive trench contact structures includes a conductive tap structure protruding through the corresponding trench insulating layer. An interlayer dielectric material is above the trench insulating layers and the gate insulating layers. A conductive structure is in direct contact with the conductive tap structure of the one of the plurality of conductive trench contact structures.
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