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公开(公告)号:EP4109311A1
公开(公告)日:2022-12-28
申请号:EP22162678.1
申请日:2022-03-17
申请人: INTEL Corporation
摘要: A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security microcontroller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.
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公开(公告)号:EP4156014A1
公开(公告)日:2023-03-29
申请号:EP22181521.0
申请日:2022-06-28
申请人: INTEL Corporation
发明人: IOVINO, Gregory , PILLILLI, Bharat , PALMER, David , ROGERS, Philip , SHAH, Neel
IPC分类号: G06F30/34 , G06F113/18 , G06F115/02 , G06F21/64 , G06F21/60 , G06F21/62 , G06F21/44
摘要: An apparatus is disclosed. The apparatus comprises an integrated circuit (IC) package including a plurality of ICs; a non-volatile memory to store configuration information comprising settings that define an operation of the plurality ICs and a configuration register to receive configuration bits from the non-volatile memory representing a final configuration for the package
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公开(公告)号:EP4020193A1
公开(公告)日:2022-06-29
申请号:EP21210857.5
申请日:2021-11-26
申请人: INTEL Corporation
IPC分类号: G06F9/4401 , G06F21/57 , G06F8/656
摘要: Examples described herein a firmware update device to execute a second firmware, in place of execution of a first firmware, in response to an instruction that causes the firmware update device to execute the second firmware, wherein the second firmware is copied to a buffer prior to execution of the instruction. In some examples, one or more processors are to execute the instruction that causes the firmware update device to execute the second firmware. In some examples, prior to execution of the instruction, a device root of trust is also to validate the second firmware.
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公开(公告)号:EP4338073A1
公开(公告)日:2024-03-20
申请号:EP22726926.3
申请日:2022-05-10
申请人: Intel Corporation
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公开(公告)号:EP4020295A1
公开(公告)日:2022-06-29
申请号:EP21195785.7
申请日:2021-09-09
申请人: INTEL Corporation
摘要: An apparatus comprising a computer platform, including a central processing unit (CPU) comprising a first security engine to perform security operations at the CPU and a chipset comprising a second security engine to perform security operations at the chipset, wherein the first security engine and the second security engine establish a secure channel session between the CPU and the chipset to secure data transmitted between the CPU and the chipset.
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