SILICON DIE WITH INTEGRATED HIGH VOLTAGE DEVICES

    公开(公告)号:EP4105969A1

    公开(公告)日:2022-12-21

    申请号:EP22187273.2

    申请日:2014-06-16

    申请人: INTEL Corporation

    摘要: A method including forming a plurality of first devices and a plurality of first interconnects on a substrate; coupling a second device layer including a plurality of second devices to ones of the plurality of first interconnect, and forming a plurality of second interconnects on the second device layer. An apparatus including a first device layer including a plurality of first circuit devices disposed between a plurality of first interconnects and a plurality of second interconnects and a second device layer including a plurality of second devices juxtaposed and coupled to one of the plurality of first interconnects and the plurality of second interconnects, wherein one of the plurality of first devices and the plurality of second devices include devices having a higher voltage range than the other of the plurality of first devices and the plurality of second devices.