公开(公告)号：EP3667706A3

公开(公告)日：2020-11-25

申请号：EP19202851.2

申请日：2019-10-11

申请人： Infineon Technologies AG

发明人： FRIEDLER, Sophia ,  MODER, Iris ,  GOLLER, Bernhard ,  MURI, Ingo

IPC分类号： H01L21/3063 ,  H01L29/66 ,  C25F3/12

摘要： A method is disclosed. The method includes: in a semiconductor wafer comprising a first semiconductor layer (10) and a second semiconductor layer (20) adjoining the first semiconductor layer (10), forming a porous region (12) extending from a first surface (11) into the first semiconductor layer (10); and removing the porous region (12) by an etching process, wherein with regard to a doping of the first semiconductor layer (10) and a doping of the second semiconductor layer (20) at least one of the following applies: a doping concentration of the second semiconductor layer (20) is less than 10 -2 times a doping concentration of the first semiconductor layer (10); a doping type of the second semiconductor layer is complementary to a doping type of the first semiconductor layer (10).

公开(公告)号：EP4420152A1

公开(公告)日：2024-08-28

申请号：EP22836320.6

申请日：2022-10-21

申请人： Infineon Technologies AG

发明人： GOLLER, Bernhard ,  BINTER, Alexander Christian ,  HOECHBAUER, Tobias, Franz Wolfgang ,  HUBER, Martin ,  MODER, Iris ,  PICCIN, Matteo ,  SANTOS RODRIGUEZ, Francisco, Javier ,  SCHULZE, Hans-Joachim

IPC分类号： H01L21/02 ,  H01L21/78 ,  H01L21/306 ,  H01L21/683

CPC分类号： H01L21/7806 ,  H01L21/306 ,  H01L21/6835 ,  H01L2221/6836820130101

公开(公告)号：EP3926661A1

公开(公告)日：2021-12-22

申请号：EP20179998.8

申请日：2020-06-15

申请人： Infineon Technologies AG

发明人： FREY, Alexander ,  MODER, Iris ,  SIGL, Alfred ,  GOLLER, Bernhard ,  WEINDLER, Tobias ,  MURI, Ingo

IPC分类号： H01L21/306 ,  H01L27/146

摘要： A method of manufacturing a semiconductor device is described. The method comprises providing a semiconductor substrate. The semiconductor substrate comprises a high-doped semiconductor substrate layer, a high-doped semiconductor device layer, and a low-doped semiconductor etch stop layer arranged between the high-doped semiconductor substrate layer and the high-doped semiconductor device layer. The high-doped semiconductor substrate layer is removed, wherein the removing comprises dopant selective chemical etching stopping at the low-doped semiconductor etch stop layer. Further, the low-doped semiconductor etch stop layer is thinned to generate an exposed surface of the high-doped semiconductor device layer.