公开(公告)号：EP1197128B1

公开(公告)日：2007-05-23

申请号：EP00946643.4

申请日：2000-06-26

Applicant: Infineon Technologies AG

Inventor： OLOFSSON, Lars-Anders

IPC: H05K1/02 ,  H05K7/20

CPC classification number: H05K1/0204 ,  H05K3/4046 ,  H05K2201/10416

Abstract: The present invention relates to a method of providing thermal vias in a printed circuit board for conducting heat from surface mounted components through said board and away therefrom. One or more holes are formed in a board material that includes a metal layer on a top side and a bottom side thereof, to form said printed circuit board. Metal plugs are pressed into the holes and affixed therein so as to seal against an inner wall of said holes in said metal layers, by causing the plugs to expand radially in said holes. A conductor pattern that includes electrical connection sites is then provided on the board material, such as to obtain said printed circuit board. The invention also relates to a printed circuit board that includes vias arranged in accordance with the aforesaid method.

公开(公告)号：EP1121840B1

公开(公告)日：2005-01-19

申请号：EP99970263.2

申请日：1999-09-23

Applicant: Infineon Technologies AG

Inventor： OLOFSSON, Lars-Anders

IPC: H05K3/34

CPC classification number: H01L24/83 ,  H01L24/29 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19043 ,  Y10T428/12528 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2224/83205

Abstract: The present invention relates to a method of soldering a semiconductor chip to a substrate, such as to a capsule in an RF-power transistor, for instance. The semiconductor chip is provided with an adhesion layer consisting of a first material composition. A solderable layer consisting of a second material composition is disposed on this adhesion layer. An antioxidation layer consisting of a third material composition is disposed on said solderable layer. The antioxidation layer is coated with a layer of gold-tin solder. The chip is placed on a solderable capsule surface, via said gold-tin solder. The capsule and chip are exposed to an inert environment to which a reducing gas is delivered and the capsule and chip are subjected to a pressure substantially beneath atmospheric pressure whilst the gold-tin solder is heated to a temperature above its melting point. The gas pressure is increased whilst the gold-tin solder is molten and the temperature is lowered when a predetermined gas pressure is exceeded, so that the gold-tin solder will solidify.