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    LATTICE REDUCTION-AIDED SYMBOL DETECTION
    1.
    发明公开
    LATTICE REDUCTION-AIDED SYMBOL DETECTION 审中-公开

    公开(公告)号：EP3369187A1

    公开(公告)日：2018-09-05

    申请号：EP15907500.1

    申请日：2015-10-30

    申请人： Intel Corporation

    发明人： SHEIKH, Farhana ,  BALATSOUKAS STIMMING, Alexios

    IPC分类号： H04B7/08 ,  H04B7/04

    CPC分类号： H04B7/0456 ,  H04B7/0413 ,  H04B7/0854

    摘要： An orthogonalization matrix calculation circuit may include a scaling coefficient calculation circuit configured to calculate a scaling coefficient for each of a plurality of candidate update operations for the orthogonalization matrix, wherein each of the plurality of candidate update operations comprises combining linearly at least one of a first column or a second column of the orthogonalization matrix previously utilized to update the orthogonalization matrix, an update operation selection circuit configured to select an optimum candidate update operation from the plurality of candidate update operations, and a matrix update circuit configured to update the orthogonalization matrix according to the scaling coefficient of the optimum candidate update operation.

    ENERGY EFFICIENT POLYNOMIAL KERNEL GENERATION IN FULL-DUPLEX RADIO COMMUNICATION
    2.
    发明公开
    ENERGY EFFICIENT POLYNOMIAL KERNEL GENERATION IN FULL-DUPLEX RADIO COMMUNICATION 审中-公开
    ENERGIEEFFIZIENTE POLYNOMISCHE KERNERZEUGUNG IN VOLULUPLEXFUNKKOMMUNIKATION

    公开(公告)号：EP3110023A1

    公开(公告)日：2016-12-28

    申请号：EP16170241.0

    申请日：2016-05-18

    申请人： Intel Corporation

    发明人： SHEIKH, Farhana ,  LEE, Ching-En ,  YEH, Shu-Ping ,  XUE, Feng ,  VAIDYA, Anuja Surendra

    IPC分类号： H04B1/525

    CPC分类号： H04B1/0475 ,  H04B1/12 ,  H04B1/525 ,  H04L5/14

    摘要： A polynomial kernel generator is configured to mitigate nonlinearity in a receiver path from a transmitter path comprising a nonlinear component in a communication device or system. The polynomial kernel generator operates to generate polynomial kernels that can be utilized to model the nonlinearity as a function of a piecewise polynomial approximation applied to a nonlinear function of the nonlinearity. The polynomial kernel generator generates kernels in a multiplier less architecture with polynomial computations in a log domain using a fixed number of adders.

    摘要翻译： 多项式核心生成器被配置为从包括通信设备或系统中的非线性分量的发射机路径减轻接收机路径中的非线性。 多项式核心发生器用于产生多项式内核，其可以用于将非线性建模为应用于非线性的非线性函数的分段多项式近似的函数。 多项式内核生成器使用固定数量的加法器在日志域中使用多项式计算在乘法器较少的架构中生成内核。

    RLS-DCD ADAPTATION HARDWARE ACCELERATOR FOR INTERFERENCE CANCELLATION IN FULL-DUPLEX WIRELESS SYSTEMS
    7.
    发明公开
    RLS-DCD ADAPTATION HARDWARE ACCELERATOR FOR INTERFERENCE CANCELLATION IN FULL-DUPLEX WIRELESS SYSTEMS 审中-公开
    RLS-DCD-ANPASSUNGS-HARDWAREBESCHLEUNIGER ZURINTERFERENZUNTERDRÜCKUNGDRAHTLOSEN DUPLEXSYSTEMEN

    公开(公告)号：EP3147777A1

    公开(公告)日：2017-03-29

    申请号：EP16184520.1

    申请日：2016-08-17

    申请人： Intel Corporation

    发明人： SHEIKH, Farhana ,  LEE, Ching-En ,  XUE, Feng ,  VAIDYA, Anuja S. ,  ALBAN, Eduardo X. ,  ANDERSSON, Albert Oskar Filip ,  CHEN, Chia-Hsiang ,  YEH, Shu-Ping

    IPC分类号： G06F9/38

    CPC分类号： H03H21/0012 ,  G06F9/3877 ,  G06F17/16 ,  H03H2021/0049 ,  H03H2021/0094 ,  H03H2218/06 ,  H04B1/525

    摘要： An adaptation hardware accelerator comprises a calculation unit configured to receive a plurality of inputs at one or more predefined time intervals, wherein each time interval corresponds to a calculation iteration, the plurality of inputs being associated with a plurality of adaptive filters each having a plurality of taps, and determine a correlation data and a cross-correlation data based thereon for a given calculation iteration. The correlation data comprises a correlation matrix comprising a plurality of sub-matrices, wherein determining the correlation matrix comprises determining only the submatrices in an upper triangular portion and a diagonal portion of the correlation matrix. Further, the adaptation hardware accelerator comprises an adaptation core unit configured to determine a plurality of adaptive weights associated with the plurality of adaptive filters, respectively, based on an optimized RLS based adaptive algorithm, by utilizing the correlation data and the cross correlation data. In addition, the hardware accelerator unit comprises a convergence detector unit configured to determine a convergence parameter; and a controller configured to generate an iteration signal for each of the predefined time intervals based on the convergence parameter. The iteration signal communicates to the calculation unit and the adaptation core unit to continue with a next calculation iteration or to conclude, wherein the conclusion indicates a determination of a final value of the plurality of the adaptive weights by the adaptation core unit.

    摘要翻译： 适配硬件加速器包括被配置为以一个或多个预定时间间隔接收多个输入的计算单元，其中每个时间间隔对应于计算迭代，所述多个输入与多个自适应滤波器相关联，每个自适应滤波器具有多个 抽头，并且基于给定的计算迭代确定相关数据和互相关数据。 相关数据包括包括多个子矩阵的相关矩阵，其中确定相关矩阵包括仅确定相关矩阵的上三角形部分和对角线部分中的子矩阵。 此外，适配硬件加速器包括：适配核心单元，被配置为通过利用相关数据和互相关数据，分别基于优化的基于RLS的自适应算法来确定与所述多个自适应滤波器相关联的多个自适应权重。 另外，硬件加速器单元包括：收敛检测器单元，被配置为确定收敛参数; 以及控制器，被配置为基于所述收敛参数为所述预定时间间隔中的每一个生成迭代信号。 迭代信号与计算单元和适配核心单元通信以继续下一个计算迭代或者得出结论，其中结论指示由适配核心单元确定多个自适应权重的最终值。

    METHOD FOR WAKING UP A COMMUNICATION DEVICE
    10.
    发明公开
    METHOD FOR WAKING UP A COMMUNICATION DEVICE 有权
    用于唤醒通信设备的方法

    公开(公告)号：EP3264674A1

    公开(公告)日：2018-01-03

    申请号：EP17174386.7

    申请日：2017-06-02

    申请人： INTEL Corporation

    发明人： DORRANCE, Richard ,  PARK, Minyoung ,  MIN, Alexander W. ,  SHEIKH, Farhana

    IPC分类号： H04L12/12 ,  H04W52/02 ,  H04L5/00

    CPC分类号： H04W52/0229 ,  H04L1/00 ,  H04L1/0061 ,  H04L12/12 ,  H04L27/06 ,  H04L69/22 ,  Y02D70/00 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/1264 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/166

    摘要： A method and a device with a main receiver and a low power wake up receiver (LP-WUR), configured to power on the main receiver upon detecting a wake up signal from the (LP-WUR), the LP-WUR configured to receive a wake up packet comprising a wake up preamble with a pseudorandom noise (PN) sequence, a receiver ID, a payload, and a frame check sequence (FCS); determine whether the wake up packet should be decoded based on the wake up packet; use the PN sequence to set a decoding threshold; decode the receiver ID, the payload, and the frame check sequence using the decoding threshold; and selectively send the wake up signal to power on the first receiver.

    摘要翻译： 一种具有主接收器和低功率唤醒接收器（LP-WUR）的方法和设备，被配置为在检测到来自（LP-WUR）的唤醒信号时接通主接收器，LP-WUR被配置为接收 包括具有伪随机噪声（PN）序列的唤醒前导码，接收器ID，有效载荷和帧校验序列（FCS）的唤醒分组; 基于唤醒分组来确定唤醒分组是否应该被解码; 使用PN序列来设置解码阈值; 使用解码阈值来解码接收器ID，有效载荷和帧校验序列; 并选择性地发送唤醒信号以在第一接收器上通电。