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公开(公告)号:EP0132646A2
公开(公告)日:1985-02-13
申请号:EP84107808.2
申请日:1984-07-05
IPC分类号: G06F7/52
CPC分类号: G06F7/5324 , G06F7/4876 , G06F7/4991 , G06F7/49936 , G06F11/0751 , G06F11/10 , G06F2207/3816 , G06F2207/3824
摘要: A high speed multiplier unit (29) for multiplying both fixed point and floating point fractioned operands. This multiplier unit is a system level functional unit which allows floating point and fixed point operations to be performed directly. In addition to multiplication, the multiplier unit performs exponent calculation, postnormalization, and error detection. The multiplier unit also provides for overlapped loading of variable lengths operands.
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公开(公告)号:EP0132646A3
公开(公告)日:1987-04-15
申请号:EP84107808
申请日:1984-07-05
IPC分类号: G06F07/52
CPC分类号: G06F7/5324 , G06F7/4876 , G06F7/4991 , G06F7/49936 , G06F11/0751 , G06F11/10 , G06F2207/3816 , G06F2207/3824
摘要: A high speed multiplier unit (29) for multiplying both fixed point and floating point fractioned operands. This multiplier unit is a system level functional unit which allows floating point and fixed point operations to be performed directly. In addition to multiplication, the multiplier unit performs exponent calculation, postnormalization, and error detection. The multiplier unit also provides for overlapped loading of variable lengths operands.
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公开(公告)号:EP0132646B1
公开(公告)日:1991-01-16
申请号:EP84107808.2
申请日:1984-07-05
IPC分类号: G06F7/52
CPC分类号: G06F7/5324 , G06F7/4876 , G06F7/4991 , G06F7/49936 , G06F11/0751 , G06F11/10 , G06F2207/3816 , G06F2207/3824
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公开(公告)号:EP0122525A3
公开(公告)日:1987-08-12
申请号:EP84103511
申请日:1984-03-30
发明人: Hefner, James Lee
IPC分类号: G06F11/20
CPC分类号: G06F11/2051
摘要: A reconfigurable parallel group of identical functional units 11 and a method for reconfiguring this parallel grouping of identical functional units upon the occurrence of failure by shifting the contents of the failed unit and the contents of all units 11 between the failed unit and a spare unit 20 one unit toward the spare unit 20. A paired system of input and output busses allows control lines 23, 25 to activate and deactivate the appropriate busses A or B of each unit 11, 20 so that a constant input/output interface is maintained despite the failure provoked shift. This reconfigurable parallel group can also be stacked together to form larger configurations comprising various levels of reconfigurable parallel units or sub-units.
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公开(公告)号:EP0122525A2
公开(公告)日:1984-10-24
申请号:EP84103511.6
申请日:1984-03-30
发明人: Hefner, James Lee
IPC分类号: G06F11/20
CPC分类号: G06F11/2051
摘要: A reconfigurable parallel group of identical functional units 11 and a method for reconfiguring this parallel grouping of identical functional units upon the occurrence of failure by shifting the contents of the failed unit and the contents of all units 11 between the failed unit and a spare unit 20 one unit toward the spare unit 20. A paired system of input and output busses allows control lines 23, 25 to activate and deactivate the appropriate busses A or B of each unit 11, 20 so that a constant input/output interface is maintained despite the failure provoked shift. This reconfigurable parallel group can also be stacked together to form larger configurations comprising various levels of reconfigurable parallel units or sub-units.
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