公开(公告)号：EP0660418A3

公开(公告)日：1995-08-30

申请号：EP94480122.4

申请日：1994-11-08

申请人： International Business Machines Corporation

发明人： Mohammad, Shaikh Noor ,  Walter, Keith Mitchell ,  Renbeck, Robert Buch

IPC分类号： H01L29/72 ,  H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/7311 ,  H01L29/7371

摘要： A Conductor Insulator Semiconductor (CIS) heterojunction transistor is described hereunder. The CIS transistor is on a semi-insulating or insulating substrate (102). A layer (104) of n type Si is deposited on the substrate. A trench (106) is formed through the n type Si layer, and may extend slightly into the substrate. The trench is filled with an insulator, preferably SiO₂. A layer (112) of p type Si 1-z Ge z (where z is the mole fraction of Ge and 0.1 ≦ z ≦ 0.9) is deposited on the n type Si layer. A p⁺ base contact region (114) is defined in the p type Si 1-z Ge z region above the oxide filled trench. A n type dopant is ion implanted into both the Si 1-z Ge z and n Si layers and may extend slightly into the substrate, forming a collector region (120). A thin oxide layer (136) is deposited on the Si 1-z Ge z layer and a low work function metal such as Al, Mg, Mn, or Ti is selectively deposited on the thin oxide and to define an emitter (130). Alternatively, the emitter may be p⁺ polysilicon. Next, the thin oxide is opened to define collector (134) and base (132) contacts. A suitable metal, such as Al is deposited in the base and collector contacts.

公开(公告)号：EP0660418A2

公开(公告)日：1995-06-28

申请号：EP94480122.4

申请日：1994-11-08

申请人： International Business Machines Corporation

发明人： Mohammad, Shaikh Noor ,  Walter, Keith Mitchell ,  Renbeck, Robert Buch

IPC分类号： H01L29/72 ,  H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/7311 ,  H01L29/7371

摘要： A Conductor Insulator Semiconductor (CIS) heterojunction transistor is described hereunder. The CIS transistor is on a semi-insulating or insulating substrate (102). A layer (104) of n type Si is deposited on the substrate. A trench (106) is formed through the n type Si layer, and may extend slightly into the substrate. The trench is filled with an insulator, preferably SiO₂. A layer (112) of p type Si 1-z Ge z (where z is the mole fraction of Ge and 0.1 ≦ z ≦ 0.9) is deposited on the n type Si layer. A p⁺ base contact region (114) is defined in the p type Si 1-z Ge z region above the oxide filled trench. A n type dopant is ion implanted into both the Si 1-z Ge z and n Si layers and may extend slightly into the substrate, forming a collector region (120). A thin oxide layer (136) is deposited on the Si 1-z Ge z layer and a low work function metal such as Al, Mg, Mn, or Ti is selectively deposited on the thin oxide and to define an emitter (130). Alternatively, the emitter may be p⁺ polysilicon. Next, the thin oxide is opened to define collector (134) and base (132) contacts. A suitable metal, such as Al is deposited in the base and collector contacts.

摘要翻译： 导体绝缘体半导体（CIS）晶体管包括衬底，在衬底层上的第一半导体材料的第一导电层和第一导电层上的第二半导体材料的第二导电层。 薄绝缘垫位于第二导电层上，第一电极位于薄绝缘垫上。 第二电极和第三电极设置在第二导电层上。 第二导电层包括第一导电类型的区域和第二导电类型的区域，第二导电类型区域从第三电极向下延伸穿过第二导电层。 CIS晶体管还包括在第一导电层中的沟槽，沟槽被绝缘材料填充。