摘要:
Self-Aligning Fiber Link characterized by an alignment chip (70) having via holes (72.1, 72.2) in which fibers (71.1; 71.2) are aligned, and which is flipped onto a substrate (60) with opto-electronic surface emitting or surface receiving elements (62.1, 62.2). Automatic and precise alignment of the fibers (71.1, 71.2) is achieved by using solder balls (66.1, 66.2) situated between the alignment chip (70) and said substrate (60). When melting these solder balls (66.1, 66.2) their surface tension automatically provides for an alignment of the assembly, such that the fibers (71.1, 71.2) are brought into a well defined position with respect to said opto-electronic elements (62.1, 62.2).
摘要:
A process for forming sidewalls for use in the fabrication of semiconductor structures, where the thin, vertical sidewalls are "image transferred" to define sub-micron lateral dimensions. First, a patterned resist profile (13A, 13B) with substantially vertical edges is formed on a substrate (11, 12) on which the sidewalls are to be created. Then, the profile is soaked in a reactive organometallic silylation agent to silylate the top and the vertical edges of the resist to a predetermined depth, thereby rendering the profile surfaces (15S, 15T) highly oxygen etch resistant. In a subsequent anisotropic RIE process, the top (15T) of the profile and the unsilylated resist are removed, leaving the silylated vertical edges (15S), that provide the desired free-standing sidewalls, essentially unaffected.
摘要:
Optoelectronic composite consisting of two chips, the first chip (10) being made of a first material, the second one (13) being made of another material. The first chip (10), for example, comprises a multiplicity of active optoelectronic devices e.g. a laser diode (11) and a photo diode (12), all being monolithically integrated. A multiplicity of other optical devices, e.g. a waveguide (16), is monolithically integrated on the second chip (13). In addition this second chip (13) has depressions of the size of the devices (11, 12) integrated on said first chip (10). These devices and the waveguide (16) of the second chip (13) are automatically aligned when flipping both chips together.
摘要:
Cooling structure (30) for direct heat transfer between an active layer (113) of a chip (103) in which electric elements are formed and a heat sink (13). The cooling structure (30) consists of a current/voltage supply level (34) with metal structures (43, 44, 45) and insulation spacers (46.1, 46.2, 46.3, 46.4) and/or layers, partly covered by an insulation layer (47.1) and followed by a heat transfer structure (48). A heat transfer bridge (25.1) in thermal connection to the heat transfer structure (48) provides for heat flux between the cooling structure (30) and the heat sink (13).
摘要:
A method, and devices produced therewith, for improving the flatness of etched mirror facets (18) of integrated optic structures with non-planar stripe waveguides (17) such as ridge or groove diode lasers or passive devices like modulators and switches. The curvature in the mirror facet surface, occurring at the edges of the waveguide due to topographical, lithographical and etch process effects, that causes detrimental phase distortions, is avoided by widening the waveguide end (23) near the mirror surface (18) thereby shifting the curved facet regions away from the light mode region (24) to surface regions (29) where curvature is not critical.
摘要:
@ Die Erfindung betrifft ein Verfahren zur Reparatur von Transmissionsmasken, bei dem nach einer Inspektion der Maske und der Speicherung der Daten (Ortskoordinaten) von Maskenfehlern die zu reparierende Maske auf ihrer Vorderseite ganzflächig mit einem Photoresist beschichtet wird. Es werden bestimmte Bereiche der Photoresistschicht über der zu reparierenden Maske mit nichtoptischer oder optischer Strahlung belichtet, um den Photoresist zu vernetzen, wobei die zur Vernetzung erforderliche Dosis von dem jeweils verwendeten Resist abhängt. Im Falle eines positiven Resists wird anschließend eine ganzflächige Belichtung durchgeführt. Die nicht oder nur einmal belichteten Bereiche der Photoresistschicht werden konventionell entwickelt und dabei entfernt. Dann wird die Maske bei der Korrektur von Maskenlöchern von der Rückseite her mit Gold bedampft, wobei die vernetzten Bereiche der Photoresistschicht als Unterlage dienen. Diese werden nach der Bedampfung mit Gold durch ein Plasmaätzverfahren entfernt. Da von dem Belichtungssystem aufgrund eines Vergleichs der Ortskoordinaten von Maskenfehlern mit den gespeicherten Strukturdaten der Maske nur die Bereiche der Photoresistschicht über Maskenfehlern belichtet und vernetzt werden, läßt sich die Maskenkorrektur im Millisekundenbereich durchführen.