公开(公告)号：EP2519976A2

公开(公告)日：2012-11-07

申请号：EP11735025.6

申请日：2011-01-14

申请人： International Business Machines Corporation

发明人： ADUSUMILLI, Praneet ,  CALLEGARI, Alessandro ,  CHANG, Josephine, B. ,  CHOI, Changhwan ,  FRANK, Martin, Michael ,  GUILLOM, Michael ,  NARAYANAN, Vijay

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L29/513

摘要： A field effect transistor device and method which includes a semiconductor substrate, a dielectric gate layer, preferably a high dielectric constant gate layer, overlaying the semiconductor substrate and an electrically conductive oxygen barrier layer overlaying the gate dielectric layer. Sn one embodiment, there is a conductive layer between the gate dielectric layer and the oxygen barrier layer, In another embodiment, there is a low resistivity metal layer on the oxygen barrier layer.

公开(公告)号：EP2522032A2

公开(公告)日：2012-11-14

申请号：EP11732064.8

申请日：2011-01-05

申请人： International Business Machines Corporation

发明人： CHANG, Josephine, B. ,  CHANG, Leland ,  LIN, Chung-hsun ,  SLEIGHT, Jeffrey, W.

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L21/26586 ,  H01L29/1083 ,  H01L29/42384 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/78615

摘要： In one exemplary embodiment of the invention, an asymmetric N-type field effect transistor includes: a source region coupled to a drain region via a channel; a gate structure overlying at least a portion of the channel; a halo implant disposed at least partially in the channel, where the halo implant is disposed closer to the source region than the drain region; and a body-tie coupled to the channel. In a further exemplary embodiment, the asymmetric N-type field effect transistor is operable to act as a symmetric N-type field effect transistor.

公开(公告)号：EP2522027A1

公开(公告)日：2012-11-14

申请号：EP11732060.6

申请日：2011-01-05

申请人： International Business Machines Corporation

发明人： CHANG, Josephine, B. ,  CHANG, Leland ,  LIN, Chung, Hsun ,  SLEIGHT, Jeffrey, W.

IPC分类号： H01L21/336

CPC分类号： H01L29/78612 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/42384 ,  H01L29/66772

摘要： In one exemplary embodiment of the invention, an asymmetric P-type field effect transistor includes: a source region coupled to a drain region via a channel; a gate structure overlying at least a portion of the channel; a halo implant disposed at least partially in the channel, where the halo implant is disposed closer to the source region than the drain region; and a body-tie coupled to the channel. In a further exemplary embodiment, the asymmetric P-type field effect transistor is operable to act as a symmetric P-type field effect transistor.