公开(公告)号：EP2396812A1

公开(公告)日：2011-12-21

申请号：EP10767544.9

申请日：2010-04-15

申请人： International Business Machines Corporation

发明人： CHANG, Josephine B. ,  CHANG, Leland ,  MO, Renee T. ,  NARAYANAN, Vijay ,  SLEIGHT, Jeffrey W.

IPC分类号： H01L21/335

CPC分类号： H01L29/7856 ,  H01L29/66795

摘要： Multiple threshold voltage (Vt) field-effect transistor (FET) devices and techniques for the fabrication thereof are provided. In one aspect, a FET device is provided including a source region; a drain region; at least one channel interconnecting the source and drain regions; and a gate, surrounding at least a portion of the channel, configured to have multiple threshold voltages due to the selective placement of at least one band edge metal throughout the gate.

公开(公告)号：EP2641214A1

公开(公告)日：2013-09-25

申请号：EP11772957.4

申请日：2011-10-18

申请人： International Business Machines Corporation

发明人： MODHA, Dharmendra, Shantilal ,  CHANG, Leland ,  MONTOYE, Robert, Kevin

IPC分类号： G06N3/063

CPC分类号： G06N3/08 ,  G06N3/063 ,  G06N3/0635 ,  G11C11/54

摘要： Embodiments of the invention provide electronic synapse devices for reinforcement learning. An electronic synapse is configured for interconnecting a pre-synaptic electronic neuron and a post-synaptic electronic neuron. The electronic synapse comprises memory elements configured for storing a state of the electronic synapse and storing meta information for updating the state of the electronic synapse. The electronic synapse further comprises an update module configured for updating the state of the electronic synapse based on the meta information in response to an update signal for reinforcement learning. The update module is configured for updating the state of the electronic synapse based on the meta information, in response to a delayed update signal for reinforcement learning based on a learning rule.

公开(公告)号：EP2641214B1

公开(公告)日：2017-06-14

申请号：EP11772957.4

申请日：2011-10-18

申请人： International Business Machines Corporation

发明人： MODHA, Dharmendra, Shantilal ,  CHANG, Leland ,  MONTOYE, Robert, Kevin

IPC分类号： G06N3/063

CPC分类号： G06N3/08 ,  G06N3/063 ,  G06N3/0635 ,  G11C11/54

公开(公告)号：EP1875516A2

公开(公告)日：2008-01-09

申请号：EP06739771.1

申请日：2006-03-27

申请人： International Business Machines Corporation

发明人： CHANG, Leland ,  NARASIMHA, Shreesh ,  ROHRER, Norman, J ,  SLEIGHT, Jeffrey, W

IPC分类号： H01L29/94

CPC分类号： H01L27/1104 ,  G11C11/412 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1203 ,  H01L27/1207

摘要： The present invention provides a 6T-SRAM semiconductintg structure including a substrate having an SOI region and a bulk-Si region, wherein the SOI region and the bulk-Si region have a same or differing crystallographic orientation; an isolation region separating the SOI region from the bulk Si-region; and at least one first device located in the SOI region and at least one second device located in the bulk-Si region. The SOI region has a silicon layer atop an insulating layer. The bulk-Si region further comprises a well region underlying the second device and a contact to the well region, wherein the contact stabilizes floating body effects. The well contact is also used to control the threshold voltages of the FETs in the bulk-Si region to optimized the power and performance of the SRAM cell built from the combination of the SOI and bulk-Si region FETs.

公开(公告)号：EP2522032A2

公开(公告)日：2012-11-14

申请号：EP11732064.8

申请日：2011-01-05

申请人： International Business Machines Corporation

发明人： CHANG, Josephine, B. ,  CHANG, Leland ,  LIN, Chung-hsun ,  SLEIGHT, Jeffrey, W.

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L21/26586 ,  H01L29/1083 ,  H01L29/42384 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/78615

摘要： In one exemplary embodiment of the invention, an asymmetric N-type field effect transistor includes: a source region coupled to a drain region via a channel; a gate structure overlying at least a portion of the channel; a halo implant disposed at least partially in the channel, where the halo implant is disposed closer to the source region than the drain region; and a body-tie coupled to the channel. In a further exemplary embodiment, the asymmetric N-type field effect transistor is operable to act as a symmetric N-type field effect transistor.

公开(公告)号：EP2522027A1

公开(公告)日：2012-11-14

申请号：EP11732060.6

申请日：2011-01-05

申请人： International Business Machines Corporation

发明人： CHANG, Josephine, B. ,  CHANG, Leland ,  LIN, Chung, Hsun ,  SLEIGHT, Jeffrey, W.

IPC分类号： H01L21/336

CPC分类号： H01L29/78612 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/42384 ,  H01L29/66772

摘要： In one exemplary embodiment of the invention, an asymmetric P-type field effect transistor includes: a source region coupled to a drain region via a channel; a gate structure overlying at least a portion of the channel; a halo implant disposed at least partially in the channel, where the halo implant is disposed closer to the source region than the drain region; and a body-tie coupled to the channel. In a further exemplary embodiment, the asymmetric P-type field effect transistor is operable to act as a symmetric P-type field effect transistor.