HYBRID CRYSTAL ORIENTATION CMOS STRUCTURE FOR ADAPTIVE WELL BIASING AND FOR POWER AND PERFORMANCE ENHANCEMENT
    4.
    发明公开
    HYBRID CRYSTAL ORIENTATION CMOS STRUCTURE FOR ADAPTIVE WELL BIASING AND FOR POWER AND PERFORMANCE ENHANCEMENT 审中-公开
    混合晶体取向CMOS结构中自适应MULDENVORBETONUNG和STROMAUFNAHME-和绩效改进

    公开(公告)号:EP1875507A2

    公开(公告)日:2008-01-09

    申请号:EP06740000.2

    申请日:2006-03-30

    IPC分类号: H01L27/12

    摘要: The present invention provides a semiconducting structure including a substrate having an SOI region and a bulk-Si region, wherein the SOI region and the bulk-Si region have a same or differing crystallographic orientation; an isolation region separating the SOI region from the bulk-Si region; and at least one first device located in the SOI region and at least one second device located in the bulk-Si region. The SOI region has an silicon layer atop an insulating layer. The bulk-Si region further comprises a well region underlying the second device and a contact to the well region, wherein the contact stabilizes floating body effects. The well contact is also used to control the threshold voltages of the FETs in the bulk-Si region to optimized the power and performance of circuits built from the combination of the SOI and bulk-Si region FETs.

    HIGH-PERFORMANCE CMOS SOI DEVICE ON HYBRID CRYSTAL-ORIENTED SUBSTRATES
    6.
    发明公开
    HIGH-PERFORMANCE CMOS SOI DEVICE ON HYBRID CRYSTAL-ORIENTED SUBSTRATES 审中-公开
    CMOS SOI元件上高性能的混合结晶取向SUBSTRATES

    公开(公告)号:EP1639637A1

    公开(公告)日:2006-03-29

    申请号:EP04741667.2

    申请日:2004-05-27

    IPC分类号: H01L21/8238 H01L21/84

    摘要: An integrated semiconductor structure containing at least one device formed upon a first crystallographic surface that is optimal for that device, while another device is formed upon a second different crystallographic surface that is optimal for the other device is provided. The method of forming the integrated structure includes providing a bonded substrate including at least a first semiconductor layer of a first crystallographic orientation and a second semiconductor layer of a second different crystallographic orientation. A portion of the bonded substrate is protected to define a first device area, while another portion of the bonded substrate is unprotected. The unprotected portion of the bonded substrate is then etched to expose a surface of the second semiconductor layer and a semiconductor material isregrown on the exposed surface. Following planarization, a first semiconductor device is formed in the first device region and a second semiconductor device is formed on theregrown material.