MODULAR IMAGING DETECTOR ASIC
    2.
    发明授权
    MODULAR IMAGING DETECTOR ASIC 有权
    模块化成像探测器ASIC

    公开(公告)号:EP3155663B1

    公开(公告)日:2018-05-16

    申请号:EP15730278.7

    申请日:2015-05-19

    Abstract: An imaging system detector array (112) includes a detector tile (116). The detector tile includes a photosensor array (202), including a plurality of photosensor pixels (204). The detector tile further includes a scintillator array (212) optically coupled to the photosensor array. The detector tile further includes an electronics layer or ASIC on a substrate (214) that is electrically coupled to the photosensor array. The electronics layer includes a plurality of individual and divisible processing regions (302). Each processing region including a predetermined number of channels corresponding to a sub-set of the plurality of photosensor pixels. The processing regions are in electrical communication with each other. Each processing region includes its own electrical reference and bias circuitry (802, 804).

    MODULAR IMAGING DETECTOR ASIC
    5.
    发明公开
    MODULAR IMAGING DETECTOR ASIC 有权
    MODULARER BILDGEBUNGSDETEKTOR-ASIC

    公开(公告)号:EP3155663A1

    公开(公告)日:2017-04-19

    申请号:EP15730278.7

    申请日:2015-05-19

    Abstract: An imaging system detector array (112) includes a detector tile (116). The detector tile includes a photosensor array (202), including a plurality of photosensor pixels (204). The detector tile further includes a scintillator array (212) optically coupled to the photosensor array. The detector tile further includes an electronics layer or ASIC on a substrate (214) that is electrically coupled to the photosensor array. The electronics layer includes a plurality of individual and divisible processing regions (302). Each processing region including a predetermined number of channels corresponding to a sub-set of the plurality of photosensor pixels. The processing regions are in electrical communication with each other. Each processing region includes its own electrical reference and bias circuitry (802, 804).

    Abstract translation: 成像系统检测器阵列(112)包括检测器瓦片(116)。 检测器瓦片包括包括多个光电传感器像素(204)的光电传感器阵列(202)。 检测器瓦片还包括光学耦合到光电传感器阵列的闪烁体阵列(212)。 检测器瓦片还包括电耦合到光电传感器阵列的衬底(214)上的电子层或ASIC。 电子层包括多个单独和可分割的处理区域(302)。 每个处理区域包括与多个光电传感器像素的子集相对应的预定数量的通道。 处理区域彼此电连通。 每个处理区域包括其自己的电参考和偏置电路(802,804)。

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