公开(公告)号：EP2201417B1

公开(公告)日：2020-12-02

申请号：EP08837593.6

申请日：2008-10-01

申请人： Luxtera, Inc.

发明人： PINGUET, Thierry ,  GLOECKNER, Steffen ,  ABDALLA, Sherif ,  MIRSAIDI, Sina ,  DE DOBBELAERE, Peter

IPC分类号： H04B10/40 ,  G02B6/42

公开(公告)号：EP2326988B1

公开(公告)日：2018-11-07

申请号：EP09812368.0

申请日：2009-09-08

申请人： Luxtera, Inc.

发明人： PINGUET, Thierry ,  GLOECKNER, Steffen ,  DE DOBBELAERE, Peter ,  ABDALLA, Sherif ,  KUCHARSKI, Daniel ,  MASINI, Gianlorenzo ,  YOKOYAMA, Kosei ,  GUCKENBERGER, John ,  MEKIS, Attila

IPC分类号： G02F3/00 ,  H04L27/144 ,  H01L21/84 ,  H01L27/12

CPC分类号： H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

公开(公告)号：EP3534209A1

公开(公告)日：2019-09-04

申请号：EP18204690.4

申请日：2009-09-08

申请人： Luxtera, Inc.

发明人： PINGUET, Thierry ,  GLOECKNER, Steffen ,  DE DOBBELAERE, Peter ,  ABDALLA, Sherif ,  KUCHARSKI, Daniel ,  MASINI, Gianlorenzo ,  YOKOYAMA, Kosei ,  GUCKENBERGER, John ,  MEKIS, Attila

IPC分类号： G02F3/00 ,  H04L27/144 ,  H01L21/84 ,  H01L27/12 ,  H01L25/065 ,  H01L25/16 ,  H04B10/40

摘要： Monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-msulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

公开(公告)号：EP2326988A1

公开(公告)日：2011-06-01

申请号：EP09812368.0

申请日：2009-09-08

申请人： Luxtera, Inc.

发明人： PINGUET, Thierry ,  GLOECKNER, Steffen ,  DE DOBBELAERE, Peter ,  ABDALLA, Sherif ,  KUCHARSKI, Daniel ,  MASINI, Gianlorenzo ,  YOKOYAMA, Kosei ,  GUCKENBERGER, John ,  MEKIS, Attila

IPC分类号： G02F3/00 ,  H04L27/144

CPC分类号： H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

摘要： Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

公开(公告)号：EP2201417A1

公开(公告)日：2010-06-30

申请号：EP08837593.6

申请日：2008-10-01

申请人： Luxtera, Inc.

发明人： PINGUET, Thierry ,  GLOECKNER, Steffen ,  ABDALLA, Sherif ,  MIRSAIDI, Sina ,  DE DOBBELAERE, Peter

IPC分类号： G02B6/26

CPC分类号： G02B6/124 ,  G02B6/30 ,  G02B6/4209 ,  G02B6/4214

摘要： Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.