摘要:
Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要:
Methods and systems for a photonic interposer are disclosed and may include receiving one or more continuous wave (CW) optical signals in a silicon photonic interposer from an external optical source, either from an optical source assembly or from optical fibers coupled to the silicon photonic interposer. The received CW optical signals may be processed based on electrical signals received from the electronics die. The modulated optical signals may be received in the silicon photonic interposer from optical fibers coupled to the silicon photonic interposer. Electrical signals may be generated in the silicon photonic interposer based on the received modulated optical signals, and may then be communicated to the electronics die via copper pillars. Optical signals may be communicated into and/or out of the silicon photonic interposer utilizing grating couplers. The electronics die may comprise one or more of: a processor core, a switch core, or router.
摘要:
Methods and systems for a photonic interposer are disclosed and may include receiving one or more continuous wave (CW) optical signals in a silicon photonic interposer from an external optical source, either from an optical source assembly or from optical fibers coupled to the silicon photonic interposer. The received CW optical signals may be processed based on electrical signals received from the electronics die. The modulated optical signals may be received in the silicon photonic interposer from optical fibers coupled to the silicon photonic interposer. Electrical signals may be generated in the silicon photonic interposer based on the received modulated optical signals, and may then be communicated to the electronics die via copper pillars. Optical signals may be communicated into and/or out of the silicon photonic interposer utilizing grating couplers. The electronics die may comprise one or more of: a processor core, a switch core, or router.
摘要:
Monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-msulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要:
Methods and systems for selectable parallel optical fiber and WDM operation may include an optoelectronic transceiver integrated in a silicon photonics die. The optoelectronic transceiver may, in a first communication mode, communicate continuous wave (CW) optical signals from an optical source module to a first subset of optical couplers on the die for processing signals in optical modulators in accordance with a first communications protocol, and in a second communication mode, communicate the CW optical signals to a second subset of optical couplers for processing signals in the optical modulators in accordance with a second communications protocol. Processed signals may be transmitted out of the die utilizing a third subset of the optical couplers. First or second protocol optical signals may be received from the fiber interface coupled to a fourth subset or a fifth subset, respectively, of the optical couplers.
摘要:
Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
摘要:
Methods and systems for optoelectronics transceivers integrated on a CMOS chip are disclosed and may include receiving optical signals from optical fibers via grating couplers on a top surface of a CMOS chip, which may include a guard ring. Photodetectors may be integrated in the CMOS chip. A CW optical signal may be received from a laser source via grating couplers, and may be modulated using optical modulators, which may be Mach-Zehnder and/or ring modulators. Circuitry in the CMOS chip may drive the optical modulators. The modulated optical signal may be communicated out of the top surface of the CMOS chip into optical fibers via grating couplers. The received optical signals may be communicated between devices via waveguides. The photodetectors may include germanium waveguide photodiodes, avalanche photodiodes, and/or heterojunction diodes. The CW optical signal may be generated using an edge-emitting and/or a vertical-cavity surface emitting semiconductor laser.