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公开(公告)号：EP1074941B1
公开(公告)日：2003-04-16
申请号：EP00121600.1
申请日：1998-01-08
发明人： Araki, Toshiyuki , Aoki, Katsuji
IPC分类号： G06T7/20
CPC分类号： H04N19/557 , G06T7/231 , G06T2207/10016 , H04N19/43
摘要： In a motion vector detection apparatus, cascade-connected processor elements each calculates the absolute value of the difference between each of a plurality of pixels which compose a picture and a corresponding one of the same number of pixels included in a block, and also performs cumulative addition of the difference absolute values in the block. These operations are performed for each of the blocks within the predetermined search area. In said cascade-connected processor elements a difference absolute value calculation means is provided, wherein the processor elements have different bit with so as to have an improved dynamic range in the calculation.
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2.发明公开Microcontroller, data processing system and task switching control method 有权Mikrokontroller，Datenverarbeitungssystem und Taskschaltungssteuerungsverfahren
公开(公告)号：EP0905618A2
公开(公告)日：1999-03-31
申请号：EP98116477.5
申请日：1998-09-01
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/3009 , G06F9/3851 , G06F9/463
摘要： A processor, a task management table, and a scheduler are built in a microcontroller. The processor sequentially runs a plurality of tasks for controlling hardware engines (cores) respectively allocated thereto. The task management table stores task management information which includes state information (ST INFO) representative of the execution state of each task, priority information (PRI INFO) representative of the execution priority of each task, and core identification information (CID INFO) representative of the allocation of the tasks to the cores. The scheduler allows the processor to switch between tasks on the basis of the task management information when a given instruction is decoded or when the execution of any one of the cores is terminated.
摘要翻译： 处理器，任务管理表和调度器内置在微控制器中。 处理器顺序地运行用于控制分配给其的硬件引擎（核）的多个任务。 任务管理表存储代表每个任务的执行状态的状态信息（ST INFO）的任务管理信息，表示各任务的执行优先级的优先级信息（PRI INFO）以及代表每个任务的执行优先级的核心识别信息（CID INFO） 将任务分配给核心。 调度器允许处理器在给定指令被解码时或当任一核心的执行终止时基于任务管理信息在任务之间切换。
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公开(公告)号：EP1622084A2
公开(公告)日：2006-02-01
申请号：EP05024129.8
申请日：1998-01-08
发明人： Araki, Toshiyuki , Aoki, Katsuji
CPC分类号： H04N19/557 , G06T7/231 , G06T2207/10016 , H04N19/43
摘要： In a motion vector detection apparatus, cascade-connected processor elements each calculates the absolute value of the difference between each of a plurality of pixels which compose a picture and a corresponding one of the same number of pixels included in a block, and also performs cumulative addition of the difference absolute values in the block. These operations are performed for each of the blocks within the predetermined seach area.
摘要翻译： 在运动矢量检测装置中，级联连接的处理器元件各自计算构成图像的多个像素中的每一个与包含在块中的相同数量的像素中的相应数量之间的差的绝对值，并且还执行累积 在块中添加差异绝对值。 对于预定区域内的每个块执行这些操作。
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公开(公告)号：EP0854439B1
公开(公告)日：2005-11-09
申请号：EP98100223.1
申请日：1998-01-08
发明人： Araki, Toshiyuki , Aoki, Katsuji
CPC分类号： H04N19/557 , G06T7/231 , G06T2207/10016 , H04N19/43
摘要： In a motion vector detection apparatus, cascade-connected processor elements each calculates the absolute value of the difference between each of a plurality of pixels which compose a picture and a corresponding one of the same number of pixels included in a block, and also performs cumulative addition of the difference absolute values in the block. These operations are performed for each of the blocks within the predetermined search area. In said cascade-connected processor elements a difference absolute value calculation means is provided, wherein the processor elements have different bit with so as to have an improved dynamic range in the calculation.
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5.发明授权Method and apparatus for detecting motion vector and image coding apparatus 有权用于检测运动矢量和图像编码装置的方法和设备
公开(公告)号：EP0899687B1
公开(公告)日：2004-01-28
申请号：EP98115342.2
申请日：1998-08-14
发明人： Aoki, Katsuji , Ohtani, Akihiko , Araki, Toshiyuki
CPC分类号： H04N5/145 , G06T7/238 , G06T2207/10016 , G06T2207/20052 , H04N19/51
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公开(公告)号：EP1622084A3
公开(公告)日：2006-04-05
申请号：EP05024129.8
申请日：1998-01-08
发明人： Araki, Toshiyuki , Aoki, Katsuji
CPC分类号： H04N19/557 , G06T7/231 , G06T2207/10016 , H04N19/43
摘要： In a motion vector detection apparatus, cascade-connected processor elements each calculates the absolute value of the difference between each of a plurality of pixels which compose a picture and a corresponding one of the same number of pixels included in a block, and also performs cumulative addition of the difference absolute values in the block. These operations are performed for each of the blocks within the predetermined seach area.
摘要翻译： 在运动矢量检测装置中，级联连接的处理器元件分别计算构成图片的多个像素的每一个与块中包括的相同数量的像素之间的差的绝对值，并且还执行累积 在块中添加差分绝对值。 这些操作是针对预定的搜索区域内的每个块执行的。
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7.发明公开
公开(公告)号：EP0905618A3
公开(公告)日：2003-01-08
申请号：EP98116477.5
申请日：1998-09-01
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/3009 , G06F9/3851 , G06F9/463
摘要： A processor, a task management table, and a scheduler are built in a microcontroller. The processor sequentially runs a plurality of tasks for controlling hardware engines (cores) respectively allocated thereto. The task management table stores task management information which includes state information (ST INFO) representative of the execution state of each task, priority information (PRI INFO) representative of the execution priority of each task, and core identification information (CID INFO) representative of the allocation of the tasks to the cores. The scheduler allows the processor to switch between tasks on the basis of the task management information when a given instruction is decoded or when the execution of any one of the cores is terminated.
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公开(公告)号：EP0901061A3
公开(公告)日：2000-02-02
申请号：EP98116615.0
申请日：1998-09-02
发明人： Jimbo, Takuya , Ohtani, Akihiko , Araki, Toshiyuki
IPC分类号： G06F1/10
CPC分类号： G06F13/1689 , G06F1/10
摘要： An operation controller, an operation unit and a memory are provided. The operation controller always receives a non-gated clock signal from a clock controller. When an operation initiating signal and a parameter signal indicating resources to be used in the operation unit are generated by a microcontroller, the operation controller asserts a request signal. In response to the request signal, respective gated clock signals are supplied from the clock controller to the operation unit and to the memory. The operation controller determines whether or not a status signal supplied from the operation unit satisfies a predetermined end condition. If the signal satisfies the end condition, the operation controller negates the request signal. As a result, the supply of the clock signals to the operation unit and to the memory is stopped.
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公开(公告)号：EP0607988A1
公开(公告)日：1994-07-27
申请号：EP94100869.0
申请日：1994-01-21
IPC分类号： G06F15/78
CPC分类号： G06F15/8092
摘要： A program controlled processor comprises a scalar processing unit 101 for normal data (= scalar) operations and branch processing, a plurality of vector processing units 102 of identical structure, a vector distributor 103 for distributing input data as block vectors to vector memory 304 in each vector processing unit 102, a vector coupler 104 for coupling the block vectors stored in vector memory 404 in each vector processing unit 102 to provide output vectors, an instruction memory 105 for storing the operations of these circuit blocks as an operating program, a sequencer 106 for sequentially reading the instruction memory 105, and a decoder 107 for interpreting the read instructions and outputting a control signal to each circuit block. The scalar processing unit 101 comprises a scalar bus input enabling the scalar processing unit 101 to refer scalar registers in the vector processing units 102. The program controlled processor has improved data processing performance because parallel vector instructions are operated in parallel in the vector processing units of block data distributed by the vector distributor.
摘要翻译： 程序控制处理器包括用于正常数据（=标量）操作和分支处理的标量处理单元101，具有相同结构的多个矢量处理单元102，用于将输入数据作为块向量分配给每个矢量存储器304的矢量分配器103 矢量处理单元102，用于将存储在矢量存储器404中的块向量耦合到每个矢量处理单元102中以提供输出矢量的矢量耦合器104，用于存储作为操作程序的这些电路块的操作的指令存储器105，定序器106 用于顺序读取指令存储器105，以及解码器107，用于解读读取指令并向每个电路块输出控制信号。 标量处理单元101包括标量总线输入，使得标量处理单元101能够引用向量处理单元102中的标量寄存器。程序控制处理器具有改进的数据处理性能，因为并行向量指令在矢量处理单元中并行操作 由矢量分配器分发的块数据。
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公开(公告)号：EP0901061B1
公开(公告)日：2003-01-15
申请号：EP98116615.0
申请日：1998-09-02
发明人： Jimbo, Takuya , Ohtani, Akihiko , Araki, Toshiyuki
IPC分类号： G06F1/10
CPC分类号： G06F13/1689 , G06F1/10
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