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公开(公告)号：EP1386224A4
公开(公告)日：2008-11-26
申请号：EP02706275
申请日：2002-02-15
申请人： MIPS TECH INC
摘要： Polynomial arithmetic instructions (3010) are provided in an instruction set architecture (ISA). A multiply-add-polynomial (MADDP) instruction and a multiply-polynomial (MULTP) instruction (3013) are provided.
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公开(公告)号：EP1379939A4
公开(公告)日：2008-08-20
申请号：EP02707785
申请日：2002-02-15
申请人： MIPS TECH INC
CPC分类号： G06F9/30018 , C04B2237/366 , G06F7/76 , G06F9/30025 , G06F9/30032 , G06F9/30036
摘要： Partial bitwise permutation instructions are provided in a microprocessor or microcontroller. Partial bitwise permutations may be specified by one or more of the following: a destination specifier, a previous partial value source, a destination subset specifier, and a control specifier. The array unit (3030) within the microprocessor or microcontroller includes two parallel multipliers (Marray 4100 and MParray 4200) and permutation logic (4300). The first array, Marray (4100), performs arithmetic multiplication. Marray (4100) uses Acc1 (3031) Acc2 (3032), M (3033) and sel (3034) as inputs and produces a ResultC and ResultS as outputs. The second array MParray 4200 performs binary polynomial multiplication. Permutation logic (4300) is used to perform various permutations on low order bits of RShold based on the value in RThold (3012).
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公开(公告)号：EP1374034A4
公开(公告)日：2006-05-17
申请号：EP02717430
申请日：2002-02-15
申请人： MIPS TECH INC
发明人： STRIBAEK MORTEN , PAILLIER PASCAL
CPC分类号： G06F9/30032 , G06F7/5338 , G06F7/5443 , G06F7/724 , G06F7/725 , G06F9/30036 , G06F9/30101 , G06F9/30145
摘要： A multiply unit includes an extended precision accumulator. Microprocessor instructions are provided for manipulating portions of the extended prescision accumulator including an instruction to move the contents of a portion of the extended accumulator to a general-purpose register ('MFLHXU') and an instruction to move the contents of a general-purpose register to a portion of the extended accumulator ('MTLHX').
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