公开(公告)号：EP1271654B1

公开(公告)日：2017-09-20

申请号：EP01902733.3

申请日：2001-02-01

申请人： MITSUBISHI DENKI KABUSHIKI KAISHA

发明人： NAKAMURA, Katsumi ,  KUSUNOKI, Shigeru ,  NAKAMURA, Hideki

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

摘要： A semiconductor device of the present invention is provided with a power device which has a semiconductor substrate having a first main surface and a second main surface that are opposed to each other and an insulating gate structure on the first main surface side, wherein a main current flows between the first main surface and the second main surface, that is to say, is provided with an insulating gate type MOS transistor structure wherein the thickness (t1) of the semiconductor substrate is no less than 50 mu m and no greater than 250 mu m and a low ON voltage and a high withstanding capacity against breakdown are implemented in the first main surface. Thereby, a low ON voltage, the maintaining of the withstanding capacity against breakdown and the reduction of a switching loss on the high voltage side can be implemented.

摘要翻译： 本发明的半导体装置具有功率器件，该功率器件具有：半导体基板，其具有彼此相对的第一主表面和第二主表面以及第一主表面侧上的绝缘栅极结构，其中主电流 在第一主表面和第二主表面之间流动，也就是说，设置有绝缘栅型MOS晶体管结构，其中半导体衬底的厚度（t1）不小于50μm且不大于250μm 并且在第一主表面中实施低导通电压和高耐击穿能力。 由此，能够实现低的导通电压，耐击穿性能的维持和高电压侧的开关损失的降低。