公开(公告)号：EP0763851A3

公开(公告)日：1997-10-08

申请号：EP96113459.0

申请日：1996-08-22

申请人： MOTOROLA, INC.

发明人： Dow, Diann M. ,  Davies, Robert B. ,  Wild, Andreas A. ,  Ilderem, Vida

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823412 ,  H01L21/823468 ,  H01L29/1045 ,  H01L29/7835

摘要： A method for forming a graded-channel field effect transistor includes providing a substrate (10) with an overlying gate electrode (14, 16). A spacer (23) is formed on only the drain side of the electrode. A graded-channel region (36) is formed aligned to the source side of the electrode while the spacer protects the drain side of the channel region. Source/drain regions (38) are formed, the spacer is removed, and then a drain extension region (40) is formed aligned to the drain side of the electrode.

摘要翻译： 一种用于形成缓变沟道场效应晶体管的方法包括：在上覆的栅极电极（14，16）提供一衬底（10）与。 间隔件（23）仅形成在所述电极的漏极侧。 甲缓变沟道区（36）形成，而间隔件保护所述沟道区的漏极侧对准电极的源极侧。 源/漏区（38）形成，间隔物被移除，然后漏极延伸区（40）形成对准电极的漏极侧。

公开(公告)号：EP0763851B1

公开(公告)日：2002-02-13

申请号：EP96113459.0

申请日：1996-08-22

申请人： MOTOROLA, INC.

发明人： Dow, Diann M. ,  Davies, Robert B. ,  Wild, Andreas A. ,  Ilderem, Vida

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823412 ,  H01L21/823468 ,  H01L29/1045 ,  H01L29/7835

公开(公告)号：EP0768715A2

公开(公告)日：1997-04-16

申请号：EP96115902.7

申请日：1996-10-04

申请人： MOTOROLA INC.

发明人： Davies, Robert B. ,  Baker, Frank K. ,  Candelaria, Jon J. ,  Wild, Andreas A. ,  Zdebel, Peter J.

IPC分类号： H01L29/10 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66583 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/7838

摘要： A graded-channel semiconductor device (10) includes a substrate region (11) having a major surface (12). A source region (13) and a drain region (14) are formed in the substrate region (11) and are spaced apart to form a channel region (16). A doped region (18) is formed in the channel region (16) and is spaced apart from the source region (13), the drain region (14), and the major surface (12). The doped region (18) has the same conductivity type as the channel region (16), but has a higher dopant concentration. The device (10) exhibits an enhanced punch-through resistance and improved performance compared to prior art short channel structures.

摘要翻译： 分级沟道半导体器件（10）包括具有主表面（12）的衬底区域（11）。 源区域（13）和漏极区域（14）形成在衬底区域（11）中并且间隔开以形成沟道区域（16）。 掺杂区域（18）形成在沟道区域（16）中并且与源极区域（13），漏极区域（14）和主表面（12）间隔开。 掺杂区域（18）具有与沟道区域（16）相同的导电类型，但具有较高的掺杂剂浓度。 与现有技术的短沟道结构相比，器件（10）表现出增强的穿通电阻和改进的性能。

公开(公告)号：EP0763851A2

公开(公告)日：1997-03-19

申请号：EP96113459.0

申请日：1996-08-22

申请人： MOTOROLA, INC.

发明人： Dow, Diann M. ,  Davies, Robert B. ,  Wild, Andreas A. ,  Ilderem, Vida

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823412 ,  H01L21/823468 ,  H01L29/1045 ,  H01L29/7835

摘要： A method for forming a graded-channel field effect transistor includes providing a substrate (10) with an overlying gate electrode (14, 16). A spacer (23) is formed on only the drain side of the electrode. A graded-channel region (36) is formed aligned to the source side of the electrode while the spacer protects the drain side of the channel region. Source/drain regions (38) are formed, the spacer is removed, and then a drain extension region (40) is formed aligned to the drain side of the electrode.