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1.
公开(公告)号:EP3857604A1
公开(公告)日:2021-08-04
申请号:EP19870314.2
申请日:2019-10-08
发明人: KARDA, Kamal M. , GANDHI, Ramanathan , LEE, Yi Fang , SILLS, Scott E. , LIU, Haitao , RAMASWAMY, Durai Vishak Nirmal
IPC分类号: H01L29/732 , H01L29/66 , H01L21/28 , H01L21/768
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公开(公告)号:EP3676878A1
公开(公告)日:2020-07-08
申请号:EP18852228.8
申请日:2018-08-30
IPC分类号: H01L29/786 , H01L27/105
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公开(公告)号:EP3259757A1
公开(公告)日:2017-12-27
申请号:EP16752758.9
申请日:2016-01-13
发明人: KARDA, Kamal M. , TAO, Qian , RAMASWAMY, Durai Vishak Nirmal , LIU, Haitao , PRALL, Kirk D. , CHAVAN, Ashonita A.
IPC分类号: G11C11/22
CPC分类号: H01L27/11502 , H01G4/08 , H01L27/10805 , H01L27/10852 , H01L27/11507 , H01L28/40 , H01L28/75
摘要: A memory cell includes a select device and a capacitor electrically coupled in series with the select device. The capacitor includes two conductive capacitor electrodes having ferroelectric material there-between. The capacitor has an intrinsic current leakage path from one of the capacitor electrodes to the other through the ferroelectric material. There is a parallel current leakage path from the one capacitor electrode to the other. The parallel current leakage path is circuit-parallel the intrinsic path and of lower total resistance than the intrinsic path. Other aspects are disclosed.
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4.
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公开(公告)号:EP3410437A1
公开(公告)日:2018-12-05
申请号:EP18180531.8
申请日:2014-10-29
IPC分类号: G11C11/22
CPC分类号: G11C11/5657 , G11C11/221 , G11C11/2273 , G11C11/2275 , H01L27/11507 , H01L28/40 , H01L43/02 , H01L43/12
摘要: Multi-bit ferroelectric memory devices and methods of forming the same are provided. One example method of forming a multi-bit ferroelectric memory device can include: forming a first conductive material (513) on an interior sidewall of a via (516); forming a first ferroelectric material (520) on the interior sidewall of the via (506); removing a dielectric material to expose an exterior sidewall of the via; forming a second ferroelectric material on the exterior sidewall of the via (516), wherein the second ferroelectric material is a different type of ferroelectric material to the first ferroelectric material; and forming a second conductive material (517) in the via.
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公开(公告)号:EP4378287A1
公开(公告)日:2024-06-05
申请号:EP22850431.2
申请日:2022-07-15
发明人: LIU, Haitao , KARDA, Kamal M. , FAYRUSHIN, Albert , DONG, Yingda
CPC分类号: H01L29/42344 , H10B43/27 , H10B43/20 , H01L29/40117
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公开(公告)号:EP4022678A1
公开(公告)日:2022-07-06
申请号:EP20856718.0
申请日:2020-08-26
IPC分类号: H01L27/108 , H01L29/788 , H01L29/66 , H01L29/423
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8.
公开(公告)号:EP3857605A1
公开(公告)日:2021-08-04
申请号:EP19870569.1
申请日:2019-10-08
发明人: SILLS, Scott E. , GANDHI, Ramanathan , RAMASWAMY, Durai Vishak Nirmal , LEE, Yi Fang , KARDA, Kamal M.
IPC分类号: H01L29/778 , H01L21/28 , H01L21/02 , H01L29/80 , H01L27/108 , H01L43/08 , H01L45/00
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公开(公告)号:EP3063766B1
公开(公告)日:2018-08-15
申请号:EP14857361.1
申请日:2014-10-29
IPC分类号: G11C11/22
CPC分类号: G11C11/5657 , G11C11/221 , G11C11/2273 , G11C11/2275 , H01L27/11507 , H01L28/40 , H01L43/02 , H01L43/12
摘要: Multi-bit ferroelectric memory devices and methods of forming the same are provided. One example method of forming a multi-bit ferroelectric memory device can include forming a first ferroelectric material on a first side of a via, removing a material to expose a second side of the via, and forming second ferroelectric material on the second side of the via at a different thickness compared to the first side of the via.
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公开(公告)号:EP4010930A1
公开(公告)日:2022-06-15
申请号:EP20852995.8
申请日:2020-08-06
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