公开(公告)号：EP1471642A1

公开(公告)日：2004-10-27

申请号：EP04090161.3

申请日：2004-04-23

申请人： NEC Electronics Corporation

发明人： Suzuki, Yasufumi, c/o NEC Micro Systems, Ltd. ,  Tomita, Yasuhiro, c/o NEC Micro Systems, Ltd. ,  Kitazawa, Motoyasu, c/o NEC Electrons Corporation

IPC分类号： H03K19/003 ,  H03K19/094 ,  H03K19/017

CPC分类号： H03K19/01728 ,  H03K19/00315 ,  H03K19/01707 ,  H03K19/09429

摘要： A semiconductor device including a tristate buffer circuit, which includes, on an output stage, at least a first transistor (P1) for pull-up driving and a second transistor (N1) for pull-down driving, in which, when a control signal (EN) is of a value indicating an enable state, an output is set to a high level or to a low level, depending on a data signal, and in which, when the control signal is of a value indicating a disable state, the first and second transistors are turned off to set a high impedance state of the output. The semiconductor device further includes a control unit (120, P6, P7) for performing control for speeding up the transition from the on-state to the off-state of the first transistor (P1) at the time of switching the control signal (EN) from the enable state to the disable state.

摘要翻译： 控制电路（120）在将控制信号从使能状态切换到禁止状态期间控制从上拉驱动（P1）的导通状态转换到关断状态的加速，其中上拉晶体管和上拉 三态缓冲电路的下降晶体管（N1）被截止以使其输出为高阻抗状态。