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公开(公告)号:EP1943576B1
公开(公告)日:2010-05-26
申请号:EP06809639.5
申请日:2006-10-18
申请人: NXP B.V.
CPC分类号: H02M1/4225 , G05F1/70 , Y02B70/126 , Y02P80/112
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公开(公告)号:EP1943720B1
公开(公告)日:2014-08-20
申请号:EP06809641.1
申请日:2006-10-18
申请人: NXP B.V.
IPC分类号: H02M3/335
CPC分类号: H02M3/33592 , Y02B70/1475
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公开(公告)号:EP1943720A2
公开(公告)日:2008-07-16
申请号:EP06809641.1
申请日:2006-10-18
申请人: NXP B.V.
IPC分类号: H02M3/335
CPC分类号: H02M3/33592 , Y02B70/1475
摘要: In a controller (CC2) for controlling a synchronous rectification switch (S2), the controller (CC2) comprises a sensing circuit (SRL) for sensing an output (D2) of the synchronous rectification switch (S2) at an end of a blanking time to obtain a sense signal (Q), and a control signal generating circuit (ANDl) for generating a control signal (G2) for the synchronous rectification switch (S2) in dependence on the sense signal (Q).
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公开(公告)号:EP1943576A1
公开(公告)日:2008-07-16
申请号:EP06809639.5
申请日:2006-10-18
申请人: NXP B.V.
CPC分类号: H02M1/4225 , G05F1/70 , Y02B70/126 , Y02P80/112
摘要: The invention relates to a power factor controller for use in a power factor correction circuit. The power factor controller comprises a first input (VinSense) for receiving an input voltage (Vin) of the power factor correction circuit, a second input (VoSense) for receiving an output voltage (Vout) of the power factor correction circuit, and a controllable current source (VCCl) having a control input coupled to the first input, and a current supply output coupled to the second input, wherein said controllable current source (VCCl) sources a current to the second input (VoSense) that is inversely proportional to the input voltage.
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公开(公告)号:EP3979503A1
公开(公告)日:2022-04-06
申请号:EP21200115.0
申请日:2021-09-30
申请人: NXP B.V.
摘要: Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator configured to generate a voltage slope based upon a fixed current and variable current; an analog comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon a reference voltage being input into the analog comparator; a second register configured to store a second count based upon an input voltage being input into the analog comparator, wherein the input voltage is the voltage to be converted to a digital value by the ADC; and a digital to analog converter (DAC) configured to produce a slope trim signal based upon the voltage slope output by the voltage slope generator, the first count, and a count target associated with the voltage reference, wherein the variable current in the voltage slope generator is based upon the slope trim signal.
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公开(公告)号:EP3968504A1
公开(公告)日:2022-03-16
申请号:EP21193995.4
申请日:2021-08-31
申请人: NXP B.V.
摘要: One example discloses a switched mode power supply device, comprising: an energy storage device; a controller configured to discharge the energy storage device; a voltage drop device having a first pin coupled to the energy storage device, a second pin coupled to the controller, and a third pin coupled to receive a first power-down signal; wherein the first power-down signal indicates that the energy storage device is to be discharged; wherein the voltage drop device is configured to input a first voltage from the energy storage device on the first pin and output a second voltage to the controller on the second pin; and wherein the second voltage is lower than the first voltage.
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公开(公告)号:EP3965301A1
公开(公告)日:2022-03-09
申请号:EP21193981.4
申请日:2021-08-31
申请人: NXP B.V.
摘要: Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage; a first comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon the first reference voltage being input into the first comparator; a second register configured to store a second count based upon the second reference voltage being input into the first comparator; a third register configured to store a third count based upon the third reference voltage being input into the first comparator; a fourth register configured to store a fourth count based upon a first input voltage being input into the first comparator, wherein the first input voltage is the voltage to be converted to a digital value by the ADC; and an output circuit configured to calculate a digital value for the first input voltage based upon the first, second, third, and fourth counts.
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公开(公告)号:EP3893370A1
公开(公告)日:2021-10-13
申请号:EP21163969.5
申请日:2021-03-22
申请人: NXP B.V.
摘要: Embodiments of an SMPS controller and a method for operating a switched-mode power supply (SMPS) controller are described. In an embodiment, an SMPS controller includes a gate driver circuit configured to generate a drive signal for a switch of an SMPS and a current sense electrical terminal configured to receive sensed current corresponding to the switch and to conduct driver discharge current from the gate driver circuit.
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