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1.发明公开
公开(公告)号：EP3567720A1
公开(公告)日：2019-11-13
申请号：EP19166889.6
申请日：2019-04-02
申请人： NXP USA, Inc.
摘要： A switched-capacitor gain stage circuit and method include an amplifier connected to an input sampling circuit with sampling switched capacitors for coupling an input voltage and a first or second reference voltage to one or more central nodes during a sampling phase and for coupling the one or more central nodes to an amplifier input during a gain phase, wherein a common-mode reference voltage generation circuit uses one or more additional sampling switched capacitors to selectively couple the first and second reference voltages to the amplifier input during the gain phase when the input voltage is between the high and low threshold voltages using a switching configuration of switches that are controllable to connect the sampling switched capacitors to the one or more central nodes in the sampling phase, and to connect the amplifier output in feedback to the input sampling circuit in the gain phase while simultaneously connecting the one or more central nodes to the first amplifier input.
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公开(公告)号：EP3570436A1
公开(公告)日：2019-11-20
申请号：EP19174769.0
申请日：2019-05-15
申请人： NXP USA, Inc.
摘要： A switched-capacitor gain stage circuit (70) and method include an amplifier (71) connected to an input sampling circuit (73) with sampling switched capacitors (C1, C2) for coupling an input voltage and a first or second reference voltage to one or more central nodes during a sampling phase and for coupling the one or more central nodes (72) to an amplifier input during a gain phase, wherein a reference loading circuit uses a plurality of sampling switched capacitors (C3, C4) connected in a switching configuration to selectively couple a first reference voltage and/or a second reference voltage to the central node by pre-charging the plurality of sampling switched capacitors with the first and second reference voltages during the sampling phase, and by coupling each of the first and second reference voltages to at least one of the plurality of sampling switched capacitors when connected to the central node during the gain phase.
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公开(公告)号：EP3439181A1
公开(公告)日：2019-02-06
申请号：EP18185620.4
申请日：2018-07-25
申请人： NXP USA, Inc.
摘要： A digital to analog converter convert digital data in binary format to thermometer bit vectors. A first set of the thermometer bit vectors corresponds to most significant bits of the digital data and a second set of the thermometer bit vectors corresponds to least significant bits of the digital data. Connections of first current sources corresponding to the first set of the thermometer bit vectors and second current sources corresponding to the second set of the thermometer bit vectors are dynamically and randomly alternated to a first output line and a second output line. Calibration current is applied to the second current sources so a total current of the second current sources and the calibration current is within a predetermined range of an average current of the first current sources.
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