公开(公告)号：EP1087533A1

公开(公告)日：2001-03-28

申请号：EP99913695.5

申请日：1999-04-19

申请人： Ohmi, Tadahiro ,  Ultraclean Technology Research Institute, Co. Ltd

发明人： OHMI, Tadahiro ,  KOTANI, Koji ,  NAKADA, Akira ,  IMAI, Makoto ,  KONDA, Masahiro ,  MORIMOTO, Tatsuo ,  YONEZAWA, Takemi ,  NOZAWA, Toshiyuki ,  NAKAYAMA, Takahiro ,  FUJIBAYASHI, Masanori ,  NITTA, Takahisa,

IPC分类号： H03M7/30 ,  H04N1/41 ,  H04N7/28

CPC分类号： H04N19/94 ,  G06T9/008 ,  H03M7/3082

摘要： With reference to one or more pieces of data (for example, the data at the left end in a block of 4 × 4 pixels) in a data string constituting one code vector in a code book, a code vector is generated by giving a value which increases in an increment of a predetermined value from the reference data value K to each piece of the other data in the block. A greatly versatile code book can be made at least for data on a pattern, for example, a face image, whose data value gradually varies by a small change.

摘要翻译： 与在构成码本中的一个码矢量数据串参照数据的一条或多条（例如，该数据在4×4像素的块的左端），通过给一个值所生成的代码矢量 这增加了在从基准数据值K到块中的每个块的其它数据的预定值的增量。 甲大大多功能码本可以至少进行用于数据上的图案，例如，面部图像，谁的dataValue逐步由一个小型变化而变化。

公开(公告)号：EP1079394A1

公开(公告)日：2001-02-28

申请号：EP99913705.2

申请日：1999-04-19

申请人： Kabushiki Kaisha Ultraclean Technology Research Institute ,  Ohmi, Tadahiro ,  Shibata, Tadashi

发明人： OHMI, Tadahiro ,  SHIBATA, Tadashi ,  WEE, Keng Hoong ,  YONEZAWA, Takemi ,  NOZAWA, Toshiyuki ,  NITTA, Takahisa, Kabushiki Kaisha Ultraclean

IPC分类号： G11C16/02

CPC分类号： G11C11/5642 ,  G11C11/5621 ,  G11C11/5628 ,  G11C27/005 ,  G11C2211/5613

摘要： The present invention is intended to provide a semiconductor memory circuit that can store analog and many-valued data at high speed and with a high degree of accuracy. The semiconductor memory circuit is characterized by comprising a memory cell in which analog and many-valued signals can be written and stored, a readout circuit having an output terminal which outputs the values stored in the memory cell to the outside as voltages, a comparator having an output terminal which outputs a write end signal when the output terminal voltage of the readout circuit equals to a predetermined voltage, a write voltage controlling circuit having an output terminal which outputs an output voltage corresponding to the analog and many-valued voltage values inputted to an input terminal as a writing voltage of the memory cell, and a write voltage switching circuit having a function which supplies the output voltage of the write voltage controlling circuit to the memory cell and stops to supply the output voltage of the write voltage controlling circuit to the memory cell when the write end signal is outputted to the output terminal of the comparator.

摘要翻译： 本发明旨在提供一种能够以高速度和高精度存储模拟和多值数据的半导体存储器电路。 半导体存储器电路的特征在于包括：存储单元，其中可以写入和存储模拟和多值信号;读出电路，具有将存储在存储单元中的值作为电压输出到外部的输出端;比较器，具有 输出端子，当读出电路的输出端子电压等于预定电压时输出写入结束信号;写入电压控制电路，具有输出端子，输出端子输出对应于模拟输入电压值和输出的多值电压值的输出电压; 作为所述存储单元的写入电压的输入端子和具有将所述写入电压控制电路的输出电压提供给所述存储单元并停止以将所述写入电压控制电路的输出电压提供给所述存储单元的功能的写入电压切换电路， 当写结束信号被输出到比较器的输出端子时存储单元。