摘要:
With reference to one or more pieces of data (for example, the data at the left end in a block of 4 × 4 pixels) in a data string constituting one code vector in a code book, a code vector is generated by giving a value which increases in an increment of a predetermined value from the reference data value K to each piece of the other data in the block. A greatly versatile code book can be made at least for data on a pattern, for example, a face image, whose data value gradually varies by a small change.
摘要:
A correlation ratio calculation section (36) quantizes the vectors of each frame of a moving picture by using a space direction code book. A space direction code book reconstruction calculating section (39) rearranges obtained code string to generate new vectors. The correlation ratio calculation section (36) quantizes the new vectors by using a time-axis code book. In such a way, not only vector quantization in the space direction is performed for each frame image, but also vector quantization in the time-axis direction is performed between frames along the time axis.
摘要:
It is an object of the present invention to provide a semiconductor arithmetic unit which realizes a maximum or minimum value retrieval operation at high speed and with a high degree of accuracy used in a vector quantization processor composed of a binary-multivalue-analog merged operation processing circuit. In addition, it is another object to add a function for retrieving a vector with a distance of necessary order to the unit. The present invention is characterized in that, in a multi-loop circuit comprising an amplifying circuit group composed of a plurality of sets of first amplifiers with a floating gate to which first electrodes and a single second electrode are capacitively coupled with a predetermined ratio, a logical operation circuit to which output signals of the amplifying circuit group are inputted and which outputs a logical 0 or 1, and a second amplifying circuit to which an output signal of the logical operation circuit is inputted and whose output is distributed to all of the second electrodes of the amplifying circuit group, the second amplifying circuit includes an adjusting circuit which adjusts an output current driving ability and a controlling circuit which controls the adjustment with a predetermined regulation, and the adjustment of the controlling circuit is executed according to variation of the output of the logical operation circuit.