公开(公告)号：EP1934710B8

公开(公告)日：2020-10-28

申请号：EP06816375.7

申请日：2006-10-04

申请人： QUALCOMM Incorporated

发明人： DOCKSER, Kenneth, Alan

IPC分类号： G06F7/57 ,  G06F7/483

公开(公告)号：EP2671151A1

公开(公告)日：2013-12-11

申请号：EP12705548.1

申请日：2012-02-06

申请人： Qualcomm Incorporated

发明人： DOCKSER, Kenneth, Alan ,  TEKMEN, Yusuf, Cagatay

IPC分类号： G06F9/38

CPC分类号： G06F9/3836 ,  G06F9/3814 ,  G06F9/3855 ,  G06F9/3877

摘要： A queuing apparatus having a hierarchy of queues, in one of a number of aspects, is configured to control backpressure between processors in a multiprocessor system. A fetch queue is coupled to an instruction cache and configured to store first instructions for a first processor and second instructions for a second processor in an order fetched from the instruction cache. An in-order queue is coupled to the fetch queue and configured to store the second instructions accepted from the fetch queue in response to a write indication. An out-of-order queue is coupled to the fetch queue and to the in-order queue and configured to store the second instructions accepted from the fetch queue in response to an indication that space is available in the out-of-order queue, wherein the second instructions may be accessed out-of-order with respect to other second instructions executing on different execution pipelines.

公开(公告)号：EP1880299A2

公开(公告)日：2008-01-23

申请号：EP06752441.3

申请日：2006-05-08

申请人： Qualcomm, Incorporated

发明人： DOCKSER, Kenneth, Alan ,  AUGSBURG, Victor, Roberts ,  DIEFFENDERFER, James, Norris ,  BRIDGES, Jeffrey, Todd ,  CLANCY, Robert, Douglas ,  SARTORIUS, Thomas, Andrew

IPC分类号： G06F13/38

CPC分类号： G06F13/4059 ,  G06F5/06 ,  G06F2205/126

摘要： Data from a source domain (311 ) operating at a first data rate is transferred to a FIFO (319) in another domain (313) operating at a different data rate. The FIFO (319) buffers data before transfer to a sink for further processing or storage. A source side counter (325) tracks space available in the FIFO. In disclosed examples, the initial counter value corresponds to FIFO depth. The counter (325) decrements in response to a data ready signal from the source domain (311)1 without delay. The counter (325) increments in response to signaling from the sink domain (313) of a read of data off the FIFO (319). Hence, incrementing is subject to the signaling latency between domains. The source (315) may send one more beat of data when the counter (325) indicates the FIFO (319) is full. The last beat of data is continuously sent from the source until it is indicated that a FIFO position became available; effectively providing one o more FIFO positions.

公开(公告)号：EP1894091A2

公开(公告)日：2008-03-05

申请号：EP06771403.0

申请日：2006-05-25

申请人： QUALCOMM INCORPORATED

发明人： DOCKSER, Kenneth, Alan

IPC分类号： G06F9/00

CPC分类号： G06F1/206 ,  G06F1/3203 ,  G06F1/3287 ,  G06F9/3017 ,  G06F9/30181 ,  G06F9/30189 ,  G06F9/3836 ,  G06F9/3869 ,  G06F9/3885 ,  G06F9/3887 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D50/20

摘要： Automatic selective power and energy control of one or more processing elements matches a degree of parallelism to a monitored condition, in a highly parallel programmable data processor. For example, logic of the parallel processor detects when program operations (e.g. for a particular task or due to a detected temperature) require less than the full width of the data path. In response, the control logic automatically sets a mode of operation requiring a subset of the parallel processing capacity. At least one parallel processing element, that is not needed, can be shut down, to conserve energy and/or to reduce heating (i.e., power consumption). At a later time, when operation of the added capacity is appropriate, the logic detects the change in processing conditions and automatically sets the mode of operation to that of the wider data path, typically the full width. The mode change reactivates the previously shut-down processing element.

摘要翻译： 在高度并行的可编程数据处理器中，一个或多个处理元件的自动选择功率和能量控制匹配与被监测条件的并行程度。 例如，并行处理器的逻辑检测程序操作（例如，针对特定任务或由于检测到的温度）何时需要小于数据路径的全宽度。 作为响应，控制逻辑自动设置需要并行处理能力子集的操作模式。 至少一个不需要的并行处理元件可以关闭，以节省能量和/或减少加热（即功耗）。 稍后，当额外容量的操作适当时，逻辑检测处理条件的变化并自动将操作模式设置为较宽数据路径的操作模式，典型地为全宽度。 模式改变重新激活先前关闭的处理元件。

公开(公告)号：EP1869547A2

公开(公告)日：2007-12-26

申请号：EP06750153.6

申请日：2006-04-14

申请人： Qualcomm Incorporated

发明人： SARTORIUS, Thomas, Andrew ,  DIEFFENDERFER, James, Norris ,  BRIDGES, Jeffrey, Todd ,  DOCKSER, Kenneth, Alan ,  MCILVAINE, Michael, Scott ,  SMITH, Rodney, Wayne

IPC分类号： G06F9/38

CPC分类号： G06F9/30072 ,  G06F9/3826 ,  G06F9/3838 ,  G06F9/384

摘要： A conditional instruction architected to receive one or more operands as inputs, to output to a target the result of an operation performed on the operands if a condition is satisfied, and to not provide an output if the condition is not satisfied, is executed so that it unconditionally provides an output to the target. The conditional instruction obtains the prior value of the target (that is, the value produced by the most recent instruction preceding the conditional instruction that updated that target). The condition is evaluated. If the condition is satisfied, an operation is performed and the result of the operation output to the target. If the condition is not satisfied, the prior value is output to the target. Subsequent instructions may rely on the target as an operand source (whether written to a register or forwarded to the instruction), prior to the condition evaluation.

公开(公告)号：EP2972790A1

公开(公告)日：2016-01-20

申请号：EP14720845.8

申请日：2014-03-14

申请人： Qualcomm Incorporated

发明人： STREETT, Daren, Eugene ,  STEMPEL, Brian, Michael ,  SPEIER, Thomas, Philip ,  SMITH, Rodney, Wayne ,  MCILVAINE, Michael, Scott ,  DOCKSER, Kenneth, Alan ,  DIEFFENDERFER, James, Norris

IPC分类号： G06F9/30 ,  G06F9/38

CPC分类号： G06F9/30098 ,  G06F9/30189 ,  G06F9/3842 ,  G06F9/3863

摘要： A processor includes a queue for storing instructions processed within the context of a current value of a register field, where for some embodiments the instruction is undefined or defined, depending upon the register field at time of processing. After a write instruction (an instruction that writes to the register field) executes, the queue is searched for any entries that contain instructions that depend upon the executed write instruction. Each such entry stores the value of the register field at the time the instruction in the entry was processed. If such an entry is found in the queue and its stored value of the register field does not match the value that the write instruction wrote to the register field, then the processor flushes the pipeline and restarts at a state so as to correctly execute the instruction.

摘要翻译： 处理器包括用于存储在寄存器字段的当前值的上下文中处理的指令的队列，其中对于一些实施例，取决于处理时的寄存器字段，指令是未定义的或定义的。 在写指令（写入寄存器字段的指令）执行之后，将搜索包含依赖于执行的写指令的指令的任何条目的队列。 每个这样的条目存储处理条目中的指令时的寄存器字段的值。 如果在队列中找到这样的条目，并且其寄存器字段的存储值与写入指令写入寄存器字段的值不匹配，则处理器刷新流水线并在状态下重新开始以正确执行指令 。