Multilayer dielectric stack and method
    2.
    发明公开
    Multilayer dielectric stack and method 有权
    介电层复合材料和方法

    公开(公告)号:EP1124262A3

    公开(公告)日:2002-10-09

    申请号:EP01301136.6

    申请日:2001-02-08

    发明人: Ma, Yanjun Ono, Yoshi

    摘要: A multilayer dielectric stack is provided which has alternating layers of a high-k material and an interposing material. The presence of the interposing material and the thinness of the high-k material layers reduces or eliminate effects of crystallization within the high-k material, even at relatively high annealing temperatures. The high-k dielectric layers are a metal oxide of preferably zirconium or hafnium. The interposing layers are preferably amorphous aluminum oxide, aluminum nitride, or silicon nitride. Because the layers reduce the effects of crystalline structures within individual layers, the overall tunneling current is reduced. Also provided are atomic layer deposition, sputtering, and evaporation as methods of depositing desired materials for forming the above-mentioned multilayer dielectric stack.

    Transistor structure comprising doped zirconia, or zirconia-like dielectic film
    4.
    发明公开

    公开(公告)号:EP1179837A2

    公开(公告)日:2002-02-13

    申请号:EP01305590.0

    申请日:2001-06-28

    发明人: Ma, Yanjun Ono, Yoshi

    摘要: A high-k dielectric films is provided, which is doped with divalent or trivalent metals to vary the electron affinity, and consequently the electron and hole barrier height. The high-k dielectric film is a metal oxide of either zirconium (Zr) or hafnium (Hf), doped with a divalent metal, such as calcium (Ca) or strontium (Sr), or a trivalent metal, such as aluminum (Al), scandium (Sc), lanthanum (La), or yttrium (Y). By selecting either a divalent or trivalent doping metal, the electron affinity of the dielectric material can be controlled, while also providing a higher dielectric constant material then silicon dioxide. Preferably, the dielectric material will also be amorphous to reduce leakage caused by grain boundaries. Also provided are sputtering, CVD, Atomic Layer CVD, and evaporation deposition methods for the above-mentioned, doped high dielectric films.

    摘要翻译: 提供了高k介电膜,其掺杂有二价或三价金属以改变电子亲和力,并因此改变电子和空穴势垒高度。 高k电介质膜是掺杂有二价金属如钙(Ca)或锶(Sr)的锆(Zr)或铪(Hf)的金属氧化物,或三价金属如铝(Al ),钪(Sc),镧(La)或钇(Y)。 通过选择二价或三价掺杂金属,可以控制介电材料的电子亲和力,同时还提供更高的介电常数材料,然后提供二氧化硅。 优选地,电介质材料也将是非晶的,以减少由晶界引起的泄漏。 还提供了用于上述掺杂的高介电膜的溅射,CVD,原子层CVD和蒸发沉积方法。

    Method of forming conducting diffusion barriers
    6.
    发明公开
    Method of forming conducting diffusion barriers 审中-公开
    一种用于生产导电扩散阻挡层的过程

    公开(公告)号:EP1134802A3

    公开(公告)日:2003-04-02

    申请号:EP01302248.8

    申请日:2001-03-12

    发明人: Ma, Yanjun

    IPC分类号: H01L21/768 H01L23/532

    摘要: A method of forming conducting diffusion barriers by depositing an initial film and implanting ions to modify the film is provided. An initial film having good step coverage is deposited over a semiconductor substrate. The initial material need not have the desired properties for a conducting diffusion barrier, but preferably contains one or more elements to be used in forming a desired film with the appropriate properties. The initial material is deposited by CVD, PECVD or IMP deposition. Ions are preferably implanted using plasma immersion ion implantation (PIII), although other methods are also provided. The method of the present invention produces binary, ternary, quaternary and other more complex films, while providing adequate step coverage.

    Method for deposition of a stressed film
    8.
    发明公开
    Method for deposition of a stressed film 审中-公开
    Verfahren zur Abscheidung einer Schicht unter Spannung

    公开(公告)号:EP0962548A3

    公开(公告)日:2001-07-25

    申请号:EP99301697.1

    申请日:1999-03-08

    摘要: A method has been provided to counteract the inherent tension in a deposited film. A wafer (50) substrate is fixed to a wafer chuck (70) having a curved surface (56). When the chuck surface is convex, a tensile stress is implanted in a deposited film (58). Upon release from the chuck, the deposited film develops a compressive stress. When the chuck surface is concave, a compressive stress is implanted in the deposited film. Upon release from the chuck, the deposited film develops a tensile stress. Loading a film with a compressive stress is helpful in making films having an inherently tensile stress become thermal stable. Stress loading is also used to improve adhesion between films, and to prevent warping of a film during annealing. A product-by-process using the above-described method is also provided.

    摘要翻译: 已经提供了一种抵消沉积膜中的固有张力的方法。 将晶片基板固定到具有弯曲表面的晶片卡盘。 当卡盘表面凸出时,在沉积膜中注入拉伸应力。 当从卡盘释放时,沉积的膜产生压缩应力。 当卡盘表面是凹形时,在沉积膜中注入压缩应力。 当从卡盘释放时,沉积的膜产生拉伸应力。 加载具有压缩应力的薄膜有助于使具有固有拉伸应力的薄膜变得热稳定。 应力负荷也用于改善膜之间的粘附性,并且防止退火期间膜的翘曲。 还提供了使用上述方法的逐个方法。

    Method for improving electrical properties of high dielectric constant films
    10.
    发明公开
    Method for improving electrical properties of high dielectric constant films 审中-公开
    方法,以改善膜的具有高介电常数的电性能

    公开(公告)号:EP1139405A3

    公开(公告)日:2004-01-28

    申请号:EP01302880.8

    申请日:2001-03-28

    发明人: Ma, Yanjun Ono, Yoshi

    IPC分类号: H01L21/316 H01L21/28

    摘要: A method of improving the electrical properties of high dielectric constant films by depositing an initial film and implanting oxygen ions to modify the film by decreasing the oxygen deficiency of the film while reducing or eliminating formation of an interfacial silicon dioxide layer. An initial high dielectric constant material is deposited over a silicon substrate by means of CVD, reactive sputtering or evaporation. Oxygen ions are preferably implanted using plasma ion immersion (PIII), although other methods are also provided. Following implantation the substrate is annealed to condition the high dielectric constant film.