摘要:
A liquid crystal display device of the present invention has a vertical scanning period in which the polarity of a display signal is positive and a vertical scanning period in which the polarity of a display signal is negative. When a pair of successive two vertical scanning periods is constituted by a first vertical scanning period and a second vertical scanning period, and when a target gradation level to be displayed in the first vertical scanning period is GL1, and a target gradation level to be displayed in the second vertical scanning period immediately after the first vertical scanning period is GL2, GL1 and GL2 being integers of 0 or more representing gradation levels, the liquid crystal display device includes a circuit (124) capable of supplying a display voltage corresponding to a gradation level to a pixel in the second vertical scanning period, the gradation level being expressed by GL2 OD which satisfies a condition where |GL2 OD -GL1| is larger than |GL2-GL1|, in the case where GL2 is different from GL1. The value of GL2 OD when the polarity in the first vertical scanning period is positive and the polarity in the second vertical scanning period is negative is different from the value of GL2 OD when the polarity in the first vertical scanning period is negative and the polarity in the second vertical scanning period is positive.
摘要:
A color display pixel P CD in a liquid crystal display device ( 100 ) includes first through fourth pixels P 1 through P 4 arrayed in two rows by two columns, and first and second signal lines ( 13a, 13b ) which are located in correspondence with each column of pixels and are supplied with signal voltages of polarities opposite to each other from a signal line driving circuit ( 30 ) in each vertical scanning period. A TFT ( 14 ) of one of the first and third pixel P 1 and P 3 is connected to the first signal line ( 13a ), and a TFT ( 14 ) of the other pixel is connected to the second signal line (1 3 b). A TFT ( 14 ) of one of the second and fourth pixel P 2 and P 4 is connected to the first signal line ( 13a ), and a TFT ( 14 ) of the other pixel is connected to the second signal line ( 13b ). The TFTs ( 14 ) of the first through fourth pixels P 1 through P 4 are controlled to be ON/OFF by a common scanning signal, and the polarities of the signal voltages supplied to the first and second signal lines ( 13a, 13b ) are constant during an arbitrary vertical scanning period. Owing to this, the load on the signal line driving circuit is reduced.