Abstract:
An image display device includes a display panel having gate and data lines electrically connected with pixels, gate and data drivers providing a gate signal and a data voltage, respectively, to corresponding ones of the pixels, and an inverter providing a lamp driving signal to drive a lamp unit. The lamp driving signal includes a wave signal of which rising and falling slope intervals are substantially equal to each other during a gate-on voltage interval in which the data voltage is charged in corresponding one of the pixels. The image display device also includes a signal controller for generating a gate control signal to control timing of generation of the gate-on voltage and a synchronization signal having a 90 DEG phase difference with respect to the gate control signal. The synchronization signal is provided to the inverter.
Abstract:
A video display method in which a visible light communication signal can be appropriately transmitted includes: generating a first visible light communication image that is an image having a stripe pattern for visible light communication, by encoding the visible light communication signal (SL11); displaying, in a predetermined frame, an image included in the video signal (SL12); and displaying, in the predetermined frame, the first visible light communication image sequentially thereafter an identification image that is an image having luminance uniformly lower than average luminance of the image that is displayed (SL13).
Abstract:
A liquid crystal display (LCD) that may include: a plurality of transistors groups forming a pixel array of said LCD, wherein the transistors groups are independently controllable; a plurality of backlight units, forming a backlight surface of said LCD, wherein the backlight units are independently controllable; a data refresh module configured to periodically refresh data at said groups of transistors, at a specified order, over a refresh cycle time; and a backlight control module configured to periodically dim the backlight units at said specified order over a backlight cycle time which is substantially shorter than the refresh cycle time.
Abstract:
A liquid crystal display (LCD) that may include: a plurality of transistors groups forming a pixel array of said LCD, wherein the transistors groups are independently controllable; a plurality of backlight units, forming a backlight surface of said LCD, wherein the backlight units are independently controllable; a data refresh module configured to periodically refresh data at said groups of transistors, at a specified order, over a refresh cycle time; and a backlight control module configured to periodically dim the backlight units at said specified order over a backlight cycle time which is substantially shorter than the refresh cycle time.
Abstract:
A display method capable of reducing the probability of communication error without causing significant deterioration of picture quality includes: specifying (SL21), as a specified light emission period, a light emission period in which light emission is performed for greater than or equal to a time required for transmitting a block included in a visible light communication signal, out of one or more light emission periods in which light emission is performed for displaying an image included in a video signal; and transmitting (SL22) the block of the visible light communication signal by luminance changing in the specified light emission period.
Abstract:
A liquid crystal display device of the present invention has a vertical scanning period in which the polarity of a display signal is positive and a vertical scanning period in which the polarity of a display signal is negative. When a pair of successive two vertical scanning periods is constituted by a first vertical scanning period and a second vertical scanning period, and when a target gradation level to be displayed in the first vertical scanning period is GL1, and a target gradation level to be displayed in the second vertical scanning period immediately after the first vertical scanning period is GL2, GL1 and GL2 being integers of 0 or more representing gradation levels, the liquid crystal display device includes a circuit (124) capable of supplying a display voltage corresponding to a gradation level to a pixel in the second vertical scanning period, the gradation level being expressed by GL2 OD which satisfies a condition where |GL2 OD -GL1| is larger than |GL2-GL1|, in the case where GL2 is different from GL1. The value of GL2 OD when the polarity in the first vertical scanning period is positive and the polarity in the second vertical scanning period is negative is different from the value of GL2 OD when the polarity in the first vertical scanning period is negative and the polarity in the second vertical scanning period is positive.
Abstract:
There is disclosed a timing controller (TCON) with frequency modulation, converter with frequency modulation for scanning-based backlight unit module, and control system for 3D display. A timing controller (TCON) with frequency modulation performs display frequency modulation of a first frame rate of a first display signal (SD1) and outputs a second display signal (SD2) at a second frame rate greater than or substantially equal to the first frame rate for presentation by a 3D display in a 3D mode or a 2D mode, selectively. A converter with frequency modulation performs scanning frequency modulation of a first scanning frequency of a first control signal (SC1) generated from the converter and outputs a second control signal at a second scanning frequency greater than or substantially equal to the first scanning frequency, selectively, for controlling the scanning-based backlight unit module of the 3D display.