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公开(公告)号：EP0694198A1
公开(公告)日：1996-01-31
申请号：EP94906385.0
申请日：1994-02-15
申请人： SHIBATA, Tadashi , OHMI, Tadahiro
CPC分类号： G11C11/5621 , G11C8/14 , G11C11/5628 , G11C11/5692 , G11C16/08 , G11C27/005 , G11C2211/5611
摘要： A semiconductor circuit which realizes a read-only memory cell having zero standby-by power consumption and capable of non-volatile storage of multiple-valued or analog data. This semiconductor device is comprised of at least a single n-channel or p-channel MOS transistor in a source-follower circuit configuration. The input of this source-follower circuit is a floating gate which is capacitively coupled to multiple control gates. The voltages applied to the control gates and the coupling ratios of the control gates determine the potential of the floating gate. When a voltage supply is applied to the drain electrode of the source-follower circuit, the source-electrode potential will nearly equal the floating gate potential.
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公开(公告)号：EP0689736A1
公开(公告)日：1996-01-03
申请号：EP94904744.0
申请日：1994-01-20
申请人： SHIBATA, Tadashi , OHMI, Tadahiro
CPC分类号： H03K17/063 , H03K17/04163 , H03K19/09425 , H03M1/361
摘要： A semiconductor circuit which realizes a source follower having a voltage gain equal to one, a decrease in the time necessary for the source follower to reach its full output voltage. Furthermore, the multiple-valued or analog output voltage can be easily converted to a binary-digital form with this circuit. This semiconductor circuit comprising at least an MOS transistor. A multiple-valued or analog data line is connected to the inputs of multiple-valued comparators, the outputs of said comparators are coupled capacitively to the input gate of a source-follower circuit, and the output of said source-follower circuit is fedback to the data line.
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