公开(公告)号：EP4174661A1

公开(公告)日：2023-05-03

申请号：EP22183261.1

申请日：2022-07-06

申请人： Samsung Electronics Co., Ltd.

发明人： CHOI, Byung Hee

IPC分类号： G06F12/02 ,  G06F3/06 ,  H04L45/00 ,  H04L45/28 ,  H04L45/302

摘要： A system, which may be a multi-dimensional memory cluster, is provided. In some embodiments, the system includes a first node (205), having an external port for making a connection to a host (207); a second node (205), connected to the first node (205) by a first memory-centric connection; the second node (205) storing a service level descriptor; the first node (205) being configured to: receive, from the host (207), a first request (825), addressed to the second node (205), for the service level descriptor; and forward the first request (825) to the second node (205), the second node (205) being configured to: receive the first request (825); and send a first response, to the first node (205), the first response including the service level descriptor of the second node.

公开(公告)号：EP4242859A1

公开(公告)日：2023-09-13

申请号：EP23158764.3

申请日：2023-02-27

申请人： Samsung Electronics Co., Ltd.

发明人： CHOI, Byung Hee ,  CHOI, Changho

IPC分类号： G06F13/42 ,  G06F9/50 ,  G06F12/02

摘要： Disclosed is a device including a host, a processor, a memory pooling device electrically connected to the processor, and a compute express link (CXL) dynamic memory capacity expansion device (DMCED), wherein the CXL DMCED is directly electrically connected to the memory pooling device and at least one of a memory capacity or a storage capacity in the memory pooling device is configured to be increased and decreased while maintaining an active power state of the device.

公开(公告)号：EP3916565A1

公开(公告)日：2021-12-01

申请号：EP21162578.5

申请日：2021-03-15

申请人： Samsung Electronics Co., Ltd.

发明人： MALLADI, Krishna Teja ,  CHANG, Andrew ,  CHOI, Byung Hee ,  NAJAFABADI, Ehsan M.

IPC分类号： G06F12/02 ,  G06F12/0815 ,  G06F15/173 ,  G06F12/0868 ,  G06F12/0811 ,  G06F12/0813 ,  G06F12/1072 ,  G06F12/0804

摘要： A system and method for managing memory resources. In some embodiments, the system includes a stored-program processing circuit, a network interface circuit, a cache-coherent switch, and a first memory module. In some embodiments, the first memory module is connected to the cache-coherent switch, the cache-coherent switch is connected to the network interface circuit, and the stored-program processing circuit is connected to the cache-coherent switch.

公开(公告)号：EP4462268A1

公开(公告)日：2024-11-13

申请号：EP23189201.9

申请日：2023-08-02

申请人： Samsung Electronics Co., Ltd.

发明人： CHOI, Byung Hee ,  CHOI, Changho

IPC分类号： G06F13/16 ,  G06F13/42

摘要： A system includes: a group of memory resources including a first memory node and a second memory node, the first memory node being connected to the second memory node over a switching fabric; and a synchronous clock source connected to the first memory node and the second memory node, the synchronous clock source to provide a synchronized clock signal to the first memory node and the second memory node to synchronize the first memory node with the second memory node. The first memory node and the second memory node are configured to encode memory data and decode encoded memory data using the synchronized clock signal, and/or to send and receive memory data to and from each other using the same synchronized clock signal.

公开(公告)号：EP4361830A1

公开(公告)日：2024-05-01

申请号：EP23202709.4

申请日：2023-10-10

申请人： Samsung Electronics Co., Ltd.

发明人： CHOI, Byung Hee ,  KADIYALA, Divya Kiran ,  CHOI, Changho

IPC分类号： G06F13/40 ,  G06F13/42

CPC分类号： G06F13/4022 ,  G06F13/4247

摘要： A system including a scalable memory pool. In some embodiments, the system includes: a first memory node, including a first memory; a second memory node, including a second memory; and a memory node switching fabric connected to the first memory node and the second memory node, the memory node switching fabric being configured to provide access, via the first memory node: with a first latency, to the first memory, and with a second latency, greater than the first latency, to the second memory.

公开(公告)号：EP4462262A1

公开(公告)日：2024-11-13

申请号：EP24172370.9

申请日：2024-04-25

申请人： Samsung Electronics Co., Ltd.

发明人： ZHANG, Tong ,  LI, Zongwang ,  ZHANG, Da ,  CHOI, Byung Hee ,  PITCHUMANI, Rekha ,  KI, Yang Seok

IPC分类号： G06F12/02 ,  G06F12/0862 ,  G06F12/0868 ,  G06F12/1027 ,  G06F12/1036

摘要： Systems and methods for prefetching data are disclosed. A processor in communication with a storage device identifies a first address. The processor identifies a first setting associated with the first address. The processor issues a first command to a first storage medium of the storage device based on the first setting. The first command is for performing a first type of memory read. The storage device is configured to retrieve first data associated with the first address in the first storage medium, to a second storage medium of the storage device, based on the first command.