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    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING MULTILEVEL DRAIN SELECT GATE ISOLATION AND METHODS OF MAKING THE SAME
    3.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING MULTILEVEL DRAIN SELECT GATE ISOLATION AND METHODS OF MAKING THE SAME 审中-公开

    公开(公告)号：EP3876276A2

    公开(公告)日：2021-09-08

    申请号：EP21165030.4

    申请日：2019-02-28

    申请人： SanDisk Technologies LLC

    发明人： NISHIKAWA, Masatoshi ,  YADA, Shinsuke ,  ZHANG, Yanli

    IPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11524

    摘要： A three-dimensional memory device includes an alternating stack of insulating layers and word-line-level electrically conductive layers located over a substrate, and a drain-select-level electrically conductive layer located over the alternating stack. Memory stack structures extend through the alternating stack and the drain-select-level electrically conductive layer. Dielectric divider structures including a respective pair of straight sidewalls and drain-select-level isolation structures including a respective pair of sidewalls that include a respective set of concave vertical sidewall segments divide the drain-select-level electrically conductive layer into multiple strips. The drain-select-level electrically conductive layer and the drain-select-level isolation structures are formed by replacement of a drain-select-level sacrificial material layer with a conductive material and by replacement of drain-select-level sacrificial line structures with dielectric material portions.

    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING MULTILEVEL DRAIN SELECT GATE ISOLATION AND METHODS OF MAKING THE SAME
    4.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE CONTAINING MULTILEVEL DRAIN SELECT GATE ISOLATION AND METHODS OF MAKING THE SAME 审中-公开

    公开(公告)号：EP3876276A3

    公开(公告)日：2021-11-17

    申请号：EP21165030.4

    申请日：2019-02-28

    申请人： SanDisk Technologies LLC

    发明人： NISHIKAWA, Masatoshi ,  YADA, Shinsuke ,  ZHANG, Yanli

    IPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11524

    摘要： A three-dimensional memory device includes an alternating stack of insulating layers and word-line-level electrically conductive layers located over a substrate, and a drain-select-level electrically conductive layer located over the alternating stack. Memory stack structures extend through the alternating stack and the drain-select-level electrically conductive layer. Dielectric divider structures including a respective pair of straight sidewalls and drain-select-level isolation structures including a respective pair of sidewalls that include a respective set of concave vertical sidewall segments divide the drain-select-level electrically conductive layer into multiple strips. The drain-select-level electrically conductive layer and the drain-select-level isolation structures are formed by replacement of a drain-select-level sacrificial material layer with a conductive material and by replacement of drain-select-level sacrificial line structures with dielectric material portions.