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    READING NON-VOLATILE STORAGE WITH EFFICIENT CONTROL OF NON-SELECTED WORD LINES
    1.
    发明公开
    READING NON-VOLATILE STORAGE WITH EFFICIENT CONTROL OF NON-SELECTED WORD LINES 审中-公开
    不读通过有效控制未选择的字线性存储

    公开(公告)号：EP1964129A1

    公开(公告)日：2008-09-03

    申请号：EP06845066.7

    申请日：2006-12-11

    申请人： SanDisk Corporation

    发明人： KAMEI, Teruhiko

    IPC分类号： G11C16/26

    CPC分类号： G11C16/26 ,  G11C16/3459 ,  G11C16/3481

    摘要： A process for reading data (including verifying during programming) from a selected non-volatile storage elements of a group (e.g., NAND string) of non-volatile storage elements includes maintaining an intermediate voltage as a control gate voltage for an unselected non-volatile storage element and subsequently changing the control gate voltage for the unselected non-volatile storage element from the intermediate voltage to a read enable voltage. The control gate voltage for the selected non- volatile storage element is raised from a standby voltage (which is different than the intermediate voltage) to a read compare voltage. While the control gate for the selected non-volatile storage element is at the read compare voltage and the control gate for the unselected non-volatile storage element is at the read enable voltage, the state of the selected non- volatile storage element is sensed to determine information about the data stored in the selected non- volatile storage element.

    NAND FLASH MEMORY CELL ARRAY AND METHOD WITH ADAPTIVE MEMORY STATE PARTITIONING
    5.
    发明公开
    NAND FLASH MEMORY CELL ARRAY AND METHOD WITH ADAPTIVE MEMORY STATE PARTITIONING 审中-公开
    NAND闪存存储器单元阵列及其方法具有自适应内存状态PARTITIONING

    公开(公告)号：EP2304733A1

    公开(公告)日：2011-04-06

    申请号：EP07855106.6

    申请日：2007-12-12

    申请人： Sandisk Corporation

    发明人： MOOGAT, Farookh ,  KAMEI, Teruhiko

    IPC分类号： G11C16/04

    CPC分类号： G11C16/3418

    摘要： A NAND type flash memory is organized into NAND strings with each being a chain of memory cells in series and connected via select transistors on both ends of the string to either a bit line or a source line. The memory cells adjacent both ends of a NAND string are particularly susceptible to errors due to program disturb. An adaptive memory-state partitioning scheme is employed to overcome the errors, in which each memory cells are generally partitioned to store multiple bits of data, except for the ones adjacent both ends where relatively less bits are stored. In this way, the storage of relatively less bits in the memory cells adjacent both ends of a NAND string affords sufficient margin to overcome the errors. For example, in a memory designed to store 2-bit data, the cells adjacent both ends of a NAND string would each be configured to store one bit of the 2-bit data.