Microcomputer having built-in nonvolatile memory
    3.
    发明公开
    Microcomputer having built-in nonvolatile memory 审中-公开
    微电脑内置非易失性存储器

    公开(公告)号:EP1041486A3

    公开(公告)日:2003-04-23

    申请号:EP00302643.2

    申请日:2000-03-30

    IPC分类号: G06F9/445 G06F11/14

    CPC分类号: G06F9/4403

    摘要: A 1-chip microcomputer having a built-in nonvolatile memory includes at least one erasable flash memory provided in a memory space of the microcomputer, a boot ROM for storing an initial program to start up the 1-chip microcomputer and a transfer program to transfer the initial program to the flash memory, and control means for, when the flash memory stores no program, transferring the initial program to the flash memory in accordance with the transfer program and subsequently removing the boot ROM from the memory space. Consequently, even if a new program is additionally stored to the nonvolatile memory in the 1-chip microcomputer, the additional program can be carried out.

    Microcomputer having built-in nonvolatile memory
    5.
    发明公开
    Microcomputer having built-in nonvolatile memory 审中-公开
    微型计算机

    公开(公告)号:EP1041486A2

    公开(公告)日:2000-10-04

    申请号:EP00302643.2

    申请日:2000-03-30

    IPC分类号: G06F9/445

    CPC分类号: G06F9/4403

    摘要: A 1-chip microcomputer having a built-in nonvolatile memory includes at least one erasable flash memory provided in a memory space of the microcomputer, a boot ROM for storing an initial program to start up the 1-chip microcomputer and a transfer program to transfer the initial program to the flash memory, and control means for, when the flash memory stores no program, transferring the initial program to the flash memory in accordance with the transfer program and subsequently removing the boot ROM from the memory space. Consequently, even if a new program is additionally stored to the nonvolatile memory in the 1-chip microcomputer, the additional program can be carried out.

    摘要翻译: 具有内置非易失性存储器的1片微型计算机包括设置在微型计算机的存储器空间中的至少一个可擦除闪存,用于存储启动单片微机的初始程序的引导ROM和用于传送的传送程序 闪速存储器的初始程序,以及控制装置,用于当闪速存储器不存储程序时,根据传送程序将初始程序传送到闪速存储器,随后从存储器空间移除引导ROM。 因此,即使在1片微型计算机中另外存储新的程序到非易失性存储器中,也可以执行附加程序。

    Program execution control circuit, computer system, and IC card
    6.
    发明公开
    Program execution control circuit, computer system, and IC card 审中-公开
    程序执行控制电路,计算机系统和IC卡

    公开(公告)号:EP1879125A3

    公开(公告)日:2010-10-20

    申请号:EP07252004.2

    申请日:2007-05-16

    发明人: Ogawa, Ryuichi

    IPC分类号: G06F21/00

    CPC分类号: G06F21/77 G06F21/51

    摘要: A computer system prevents an illegal program transmitted from an external communication device to a computer system such as IC cards and stored therein from being executed. The system comprises a CPU (3), a communication circuit (4), a first memory area (5) storing a first and second computer program, a second memory area (6) including storage areas for the first computer program, for data received by the communication circuit, for data used in program execution of the CPU. When a program to be executed by the CPU is the first computer program, if the program code is stored in the first memory area (5) or a storage area for the first computer program in the second memory area (6), the program is allowed to be executed, and if the program code is stored in the second memory area (6) other than the storage area for the first computer program, the program is not allowed to be executed.

    Program execution control circuit, computer system, and IC card
    7.
    发明公开
    Program execution control circuit, computer system, and IC card 审中-公开
    Programmausführungssteuerschaltung,Computersystem和IC-Karte

    公开(公告)号:EP1879125A2

    公开(公告)日:2008-01-16

    申请号:EP07252004.2

    申请日:2007-05-16

    发明人: Ogawa, Ryuichi

    IPC分类号: G06F21/00

    CPC分类号: G06F21/77 G06F21/51

    摘要: A computer system prevents an illegal program transmitted from an external communication device to a computer system such as IC cards and stored therein from being executed. The system comprises a CPU (3), a communication circuit (4), a first memory area (5) storing a first and second computer program, a second memory area (6) including storage areas for the first computer program, for data received by the communication circuit, for data used in program execution of the CPU. When a program to be executed by the CPU is the first computer program, if the program code is stored in the first memory area (5) or a storage area for the first computer program in the second memory area (6), the program is allowed to be executed, and if the program code is stored in the second memory area (6) other than the storage area for the first computer program, the program is not allowed to be executed.

    摘要翻译: 计算机系统防止从外部通信设备发送到诸如IC卡的计算机系统并存储在其中的非法程序被执行。 该系统包括CPU(3),通信电路(4),存储第一和第二计算机程序的第一存储区域(5),包括用于第一计算机程序的存储区域的第二存储区域(6),用于接收数据 通过通信电路,用于CPU的程序执行中使用的数据。 当要由CPU执行的程序是第一计算机程序时,如果程序代码存储在第二存储区域(6)的第一存储区域(5)或第一计算机程序的存储区域中,程序是 允许执行,并且如果程序代码存储在除了第一计算机程序的存储区域之外的第二存储区域(6)中,则不允许程序被执行。

    IC card with built-in coprocessor for auxiliary arithmetic, and control method thereof
    8.
    发明公开
    IC card with built-in coprocessor for auxiliary arithmetic, and control method thereof 审中-公开
    巧克力mit aut hem hem hem hem hem hemürürürürürürürürürürürürür

    公开(公告)号:EP1564630A1

    公开(公告)日:2005-08-17

    申请号:EP05250585.6

    申请日:2005-02-03

    IPC分类号: G06F1/32 G06K19/07

    摘要: An IC card (17) according to the present invention comprises, a built-in coprocessor (3) for an auxiliary arithmetic in addition to a main arithmetic processing unit (5), an interval timer (4) for outputting an interrupt request signal (8) upon lapse of a set time shorter than the frame waiting time, and coprocessor control means (1, 2, 5) for controlling the coprocessor operation (3) by suspending supply of an operation clock (16) to the coprocessor (3) in accordance with the output of the interrupt request signal (8) and resuming supply of the operation clock (16) to the coprocessor (3) in accordance with a predetermined response input from an external device (14). Upon receipt of a command from the external device (14), the contents of the command are determined, and the time shorter than the frame waiting time is set in the interval timer (4) thereby to start the interval timer (4).

    摘要翻译: 根据本发明的IC卡(17)除了主算术处理单元(5)之外还包括用于辅助算术的内置协处理器(3),用于输出中断请求信号的间隔定时器(4) 以及通过暂停向协处理器(3)提供操作时钟(16)来控制协处理器操作(3)的协处理器控制装置(1,2,5) 根据中断请求信号(8)的输出,并根据从外部设备(14)输入的预定响应,恢复向协处理器(3)提供操作时钟(16)。 在从外部设备(14)接收到命令时,确定命令的内容,并且在间隔定时器(4)中设置比帧等待时间短的时间,从而启动间隔定时器(4)。