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公开(公告)号:EP3174056B1
公开(公告)日:2019-11-06
申请号:EP15200335.6
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10 , G11C5/14 , G11C11/4099
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公开(公告)号:EP3174057A1
公开(公告)日:2017-05-31
申请号:EP15200336.4
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10
CPC分类号: G11C5/147 , G05F3/205 , G05F3/265 , G05F3/30 , G11C5/14 , G11C7/1084 , G11C11/4074 , G11C11/4096
摘要: A control method for a data reception chip. The data reception chip includes a voltage generation module including a plurality of resistors and a selection unit. The resistors are connected in series with one another and divide an operation voltage to generate a plurality of divided voltages. The selection unit selects one of the divided voltages as a reference voltage according to a control signal. The control method includes controlling the selection unit to set the level of the reference voltage to an initial level; receiving data and comparing the data with the reference voltage to generate a compared result; determining whether the compared result is equal to predetermined data; and directing the selection unit to select another divided voltage when the compared result is not equal to the pre-determined data.
摘要翻译: 一种数据接收芯片的控制方法。 数据接收芯片包括具有多个电阻器和选择单元的电压生成模块。 这些电阻器彼此串联连接并划分操作电压以生成多个分压。 选择单元根据控制信号选择分压中的一个作为参考电压。 控制方法包括控制选择单元将参考电压的电平设置为初始电平; 接收数据并将数据与参考电压进行比较以产生比较结果; 确定比较结果是否等于预定数据; 并且当比较结果不等于预定数据时指示选择单元选择另一分压。
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公开(公告)号:EP3174059B1
公开(公告)日:2019-11-06
申请号:EP15200354.7
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10 , G11C11/4099
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公开(公告)号:EP3174057B1
公开(公告)日:2019-10-09
申请号:EP15200336.4
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10 , G11C5/14 , G11C11/4074 , G11C11/4096 , G05F3/20 , G05F3/26 , G05F3/30
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公开(公告)号:EP3174056A1
公开(公告)日:2017-05-31
申请号:EP15200335.6
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10
摘要: A data reception chip coupled to an external memory including a first input-output pin to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage and includes a first resistor, a second resistor, a first capacitor and a second capacitor. The second resistor is serially connected to the first resistor. The first and second resistors divide a first operation voltage to generate the first reference voltage. The second capacitor is serially connected to the first capacitor. The first and second capacitors direct the first reference voltage to track the noise of the first operation voltage.
摘要翻译: 提供一种数据接收芯片,其耦合到包括第一输入 - 输出引脚的外部存储器以输出第一数据并且包括比较模块和电压产生模块。 比较模块耦接第一输入输出接脚以接收第一数据,并比较第一数据与第一参考电压以识别第一数据的值。 电压产生模块被配置为产生第一参考电压并且包括第一电阻器,第二电阻器,第一电容器和第二电容器。 第二电阻器串联连接到第一电阻器。 第一和第二电阻器分割第一操作电压以生成第一参考电压。 第二电容器串联连接到第一电容器。 第一和第二电容器引导第一参考电压来跟踪第一操作电压的噪声。
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公开(公告)号:EP3174059A1
公开(公告)日:2017-05-31
申请号:EP15200354.7
申请日:2015-12-16
发明人: SUN, Hongquan
IPC分类号: G11C7/10
摘要: A data reception chip coupled to an external memory comprising a first input-output pin to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage and includes a plurality of first resistors and a first selection unit. The first resistors are connected in series with one another and dividing a first operation voltage to generate a plurality of first divided voltages. The first selection unit selects one of the first divided voltages as the first reference voltage according to a first control signal.
摘要翻译: 提供一种数据接收芯片,其耦合到外部存储器,该外部存储器包括第一输入 - 输出引脚以输出第一数据并且包括比较模块和电压产生模块。 比较模块耦接第一输入输出接脚以接收第一数据,并比较第一数据与第一参考电压以识别第一数据的值。 电压产生模块被配置为产生第一参考电压并且包括多个第一电阻器和第一选择单元。 第一电阻器彼此串联连接并划分第一操作电压以生成多个第一分压。 第一选择单元根据第一控制信号选择第一分压电压中的一个作为第一参考电压。
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