公开(公告)号：EP2543063B1

公开(公告)日：2019-05-08

申请号：EP11751170.9

申请日：2011-03-01

Applicant: Veeco Instruments Inc.

Inventor： MITROVIC, Bojan ,  MANGUM, Joshua ,  QUINN, William, E.

IPC: H01L21/687 ,  C23C16/30 ,  C23C16/455 ,  C23C16/458

公开(公告)号：EP2973661A1

公开(公告)日：2016-01-20

申请号：EP14762924.0

申请日：2014-03-14

Applicant: Veeco Instruments Inc.

Inventor： KRISHNAN, Sandeep ,  QUINN, William, E. ,  MONTGOMERY, Jeffrey, S. ,  MANGUM, Joshua ,  URBAN, Lukas

IPC: H01L21/205 ,  H01L21/324

CPC classification number: C30B25/12 ,  B23P19/04 ,  C23C16/4584 ,  C23C16/4585 ,  H01L21/68728 ,  H01L21/68735 ,  H01L21/68764 ,  H01L21/68771 ,  Y10T29/49826

Abstract: A wafer carrier and methods of making the same for use in a system for growing epitaxial layers on one or more wafers by chemical vapor deposition. The wafer carrier includes wafer retention pockets recessed in its body. A thermally-insulating spacer is situated at least partially in the at least one wafer retention pocket and arranged to maintain a spacing between the peripheral wall surface and the wafer, the spacer being constructed from a material having a thermal conductivity less than a thermal conductivity of the wafer carrier such that the spacer limits heat conduction from portions of the wafer carrier body to the wafer. The wafer carrier further includes a spacer retention feature that engages with the spacer and includes a surface oriented to prevent centrifugal movement of the spacer when subjected to rotation about the central axis.

Abstract translation: 一种晶片载体及其制造方法，用于通过化学气相沉积在一个或多个晶片上生长外延层的系统中。 晶片载体包括凹入其体内的晶片保留孔。 隔热间隔件至少部分地位于至少一个晶片保持袋中并且被布置成保持周壁表面和晶片之间的间隔，该间隔件由导热率小于热导率的材料构成 晶片载体使得间隔物限制从晶片载体的部分到晶片的热传导。 晶片载体还包括间隔件保持特征，其与间隔件接合并且包括定向成防止间隔件围绕中心轴旋转时的离心运动的表面。

公开(公告)号：EP2543063A2

公开(公告)日：2013-01-09

申请号：EP11751170.9

申请日：2011-03-01

Applicant: Veeco Instruments Inc.

Inventor： MITROVIC, Bojan ,  MANGUM, Joshua ,  QUINN, William, E.

IPC: H01L21/683 ,  H01L21/205 ,  C23C16/458

CPC classification number: H01L21/68764 ,  C23C16/303 ,  C23C16/45563 ,  C23C16/45587 ,  C23C16/4584 ,  C23C16/4585 ,  H01L21/68735 ,  H01L21/68771

Abstract: A wafer carrier includes a body defining a central axis, a generally planar top surface perpendicular to the central axis, and pockets recessed below the top surface for receiving wafers. The body can include a lip projecting upwardly around the periphery of the top surface. The lip can define a lip surface sloping upwardly from the planar top surface in a radially outward direction away from the central axis. The body can be adapted for mounting on a spindle of a processing apparatus so that the central axis of the body is coaxial with the spindle. The lip can improve the pattern of gas flow over the top surface of the wafer carrier.

Abstract translation: 晶片载体包括限定中心轴线的主体，垂直于中心轴线的大致平坦的顶表面以及凹陷在顶表面下方用于接收晶片的凹穴。 主体可以包括围绕顶表面的周边向上突出的唇部。 唇部可限定从平坦顶部表面向远离中心轴线的径向向外方向向上倾斜的唇部表面。 该主体可以适用于安装在加工设备的主轴上，使得主体的中心轴线与主轴同轴。 该唇可以改善晶片载体上表面上的气体流动模式。

公开(公告)号：EP2507826A2

公开(公告)日：2012-10-10

申请号：EP10834932.5

申请日：2010-11-12

Applicant: Veeco Instruments Inc.

Inventor： MANGUM, Joshua ,  QUINN, William, E.

IPC: H01L21/673 ,  H01L21/683 ,  H01L21/20

CPC classification number: H01L21/67383 ,  C23C16/44 ,  H01L21/02104 ,  H01L21/67366 ,  H01L21/68735 ,  H01L21/68771 ,  H01L22/12 ,  H01L22/20

Abstract: A method of modifying a substrate carrier to improve process performance includes depositing material or fabricating devices on a substrate supported by a substrate carrier. A parameter of layers deposited on the substrate is then measured as a function of their corresponding positions on the substrate carrier. The measured parameter of at least some devices fabricated on the substrate or a property of the deposited layers is related to a physical characteristic of substrate carrier to obtain a plurality of physical characteristics of the substrate carrier corresponding to a plurality of positions on the substrate carrier. The physical characteristic of the substrate carrier is then modified at one or more of the plurality of corresponding positions on the substrate carrier to obtain desired parameters of the deposited layers or fabricated devices as a function of position on the substrate carrier.

公开(公告)号：EP2347028A1

公开(公告)日：2011-07-27

申请号：EP09789390.3

申请日：2009-10-02

Applicant: Veeco Instruments Inc.

Inventor： ARMOUR, Eric, A. ,  QUINN, William, E. ,  MANGUM, Joshua

IPC: C23C16/30 ,  C23C16/48

CPC classification number: C23C16/511 ,  C23C16/303 ,  C23C16/45551 ,  C23C16/483 ,  C30B25/105 ,  C30B29/403 ,  C30B29/406

Abstract: Methods of depositing compound semiconductors onto substrates (20) are disclosed, including directing gaseous reactants (30, 34) into a reaction chamber (10) containing the substrates (20), selectively supplying energy (31a, 31b) to one of the gaseous reactants (30, 34) in order to impart sufficient energy to activate that reactant but insufficient to decompose the reactant, and then decomposing the reactant at the surface of the substrate (20) in order to react with the other reactants. The preferred energy source (31a, 31b) is microwave or infrared radiation, and reactors (10) for carrying out these methods are also disclosed.