摘要:
shared line receiver module, operative to accept phase-encoded bits serially from a shared line for predetermined buffering and subsequent transferral in parallel to an input-output channel, includes a decoder operative to receive phase transitions of a signal from the shared line for conversion Into a predetermined series of logic signals; a first memory operative to receive the predetermined series of logic signals for the holding thereof for a predetermined period; an address recognizer operative to receive a first byte of the predetermined series of logic signals from the first memory indicating the destination address when available for holding thereof for a predetermined period, and an identification address register operative to receive an address from the input-output channel for uniquely identifying the shared line receiver, and for comparing with identification address in said address recognized for the predetermined series of logic signals to the input-output channel when an address match is obtained.
摘要:
A copy reproduction machine Subdivided into discrete operating modules and coupled together by a shared communication line over which operating messages from and to the modules are transmitted. Each module includes a receiver for intercepting and capturing messages bearing the module's address and a transmitter for transmitting messages from the module and addressed to other modules over the shared communication line.
摘要:
A shared line transmitter is operative to accept as a message one or more bytes of data in parallel from an input-output channel for predetermined buffering and phase encoding for transmission to a shared line except upon receipt of signal indicating that another transmitter is attempting to gain access to the shared line. It includes an output buffer operative to receive the message from the input-output channel and hold it for a predetermined period; a memory operative to receive the message from the output buffer and hold it for a predetermined period for subsequent transmission in serial form; a phase encoder operative to receive the data in serial form for conversion to a predetermined phase-encoded form for outputting to the shared line. and means for aborting the conversion upon receipt of a message-collision signal for transmitting a signal onto the shared line to abort all concurrent message transmissions, and backoff logic operative to receive the abort signal from the phase encoder to generate a random number representing the period that must elapse before the next transmission.
摘要:
A copy reproduction machine Subdivided into discrete operating modules and coupled together by a shared communication line over which operating messages from and to the modules are transmitted. Each module includes a receiver for intercepting and capturing messages bearing the module's address and a transmitter for transmitting messages from the module and addressed to other modules over the shared communication line.
摘要:
shared line receiver module, operative to accept phase-encoded bits serially from a shared line for predetermined buffering and subsequent transferral in parallel to an input-output channel, includes a decoder operative to receive phase transitions of a signal from the shared line for conversion Into a predetermined series of logic signals; a first memory operative to receive the predetermined series of logic signals for the holding thereof for a predetermined period; an address recognizer operative to receive a first byte of the predetermined series of logic signals from the first memory indicating the destination address when available for holding thereof for a predetermined period, and an identification address register operative to receive an address from the input-output channel for uniquely identifying the shared line receiver, and for comparing with identification address in said address recognized for the predetermined series of logic signals to the input-output channel when an address match is obtained.
摘要:
A communication system having multiple distributed control elements that operatively intercommunicate through packets of digital data over a shared line for directing control of a machine process. Each control element is adapted to abort the attempted transmission of data for a period of random duration upon detection of another element attempting to do the same; to cause all other elements to be inhibited while both the respective elements are self- inhibited, and to double its abortion period if interference is still detected when its first period ends.