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    Generation method of a variable analogue signal generated by a PWM signal and system generating such a signal
    3.
    发明公开
    Generation method of a variable analogue signal generated by a PWM signal and system generating such a signal 有权
    用于生产PWM信号的方法产生可变模拟信号和系统生产这种信号

    公开(公告)号：EP2009798A1

    公开(公告)日：2008-12-31

    申请号：EP08159004.4

    申请日：2008-06-25

    申请人： Thomson Licensing

    发明人： Mace, Philippe ,  Guitton, Xavier ,  Benezeth, Philippe

    IPC分类号： H03M1/08 ,  G05B11/28

    CPC分类号： H03M1/0881 ,  H03M1/822

    摘要： The present invention relates to a generation method of a variation form of an analogue signal generated by a PWM signal whose cyclic ratio and period are programmable. A signal can thus be generated whose evolution is linear over time. A succession of generation steps of a PWM signal during which different period and cyclic ratio values are applied, as well as pairs have different periods with the same cyclic ratio, thus enabling the analogue signal to be varied with great precision. According to an improvement, each generation step of a new PWM signal with different period and cyclic ratio values is applied over time slots of equal time.
    The present invention also relates to a generation system of a variable analogue signal implementing the method.

    摘要翻译： 本发明涉及通过一个PWM信号，其循环比和周期是可编程产生的模拟信号的变化形式的生成方法。 的信号可因此谁的演变是随时间线性地产生。 的期间不同的期间和循环比值的PWM信号的产生步骤的连续施加，以及对具有相同循环比不同的周期，从而使所述模拟信号，以非常精确地变化。 在改进。据，具有不同的周期和循环比值的新的PWM信号的各产生步骤是相等的时间应用超时时隙。 因此，本发明涉及实现该方法的可变模拟信号的产生系统。

    Segmented mixed signal circuitry using shaped clock pulses for switching
    4.
    发明公开
    Segmented mixed signal circuitry using shaped clock pulses for switching 有权
    用于由成形的时钟脉冲的装置切换的混合信号分割电路

    公开(公告)号：EP1720258A1

    公开(公告)日：2006-11-08

    申请号：EP06013328.7

    申请日：2002-05-23

    申请人： FUJITSU LIMITED

    发明人： Dedic, Ian Juso ,  Walker, Darren

    IPC分类号： H03M1/08 ,  H03K5/151 ,  H03M1/74

    CPC分类号： H03M1/0881 ,  H03M1/747

    摘要： A switch driver circuit, for driving a switching circuit, comprises a data node for receiving an input data signal (T ODD ), a clock node for receiving a clock signal (CLK ODD ), first and second output nodes for supplying drive signals (V S1 and V S2 ) to the switching circuit, a first switch (SW8) for connecting the clock node to the first output node, and a second switch (SW7) for connecting the clock node to the second output node. The circuit is arranged such that the first and second switches do not change state when a clock signal received at the clock node changes state. Two or more such switch driver circuits, supplied with separate clock signals and data signals, may be used to supply drive signals to a common differential switching circuit, for example in a digital-to-converter.

    摘要翻译： 一种开关驱动电路，用于驱动开关电路，包括数据节点在输入数据信号（T ODD），用于接收时钟信号（CLK ODD），第一和第二输出节点用于提供驱动信号的时钟节点接收（V S1和V S2）到开关电路，第一开关（SW8）的时钟节点连接到所述第一输出节点，并为时钟节点连接到所述第二输出节点的第二开关（SW7）。 被布置检查电路并在第一和第二开关不改变状态。当在时钟节点接收的时钟信号改变状态。 两个或更多个搜索开关的驱动器电路，具有独立的时钟信号和数据信号，可用于供应驱动信号至公共差分开关电路，例如，在一数字转换器。

    A stray pulse eliminating device for a digital-to-analog converter
    9.
    发明公开
    A stray pulse eliminating device for a digital-to-analog converter 失效
    用于数字到模拟转换器的脉冲消除装置

    公开(公告)号：EP0136739A3

    公开(公告)日：1987-10-21

    申请号：EP84201130

    申请日：1984-08-01

    申请人： Philips Norden AB ,  N.V. Philips' Gloeilampenfabrieken

    发明人： Akerlund, Mats Peter ,  Strömbäck, Ture Johannes

    IPC分类号： H03M01/06 ,  H03M01/66

    CPC分类号： H03M1/0881

    摘要： The invention relates to a device for eliminating stray pulses occuring on the output of a digital-to-analogue converter DA. The pulses may be caused by, for example, insufficient synchronism in the input data bits and may be predicted in time. According to the invention an inductor L is arranged between the output of the digital-to-analogue converter and a following circuit F, for example a deflecting amplifier for random scan displays, and a switch S2 is arranged between the said output and ground which switch when a pulse is predicted to occur shortcircuits the output of the digital-to-analogue converter to ground. Hereby an eliminating device of simple and cheap construction is obtained operating at high frequencies.

    A stray pulse eliminating device for a digital-to-analog converter
    10.
    发明公开
    A stray pulse eliminating device for a digital-to-analog converter 失效
    杂散脉冲消除装置为DA转换器。

    公开(公告)号：EP0136739A2

    公开(公告)日：1985-04-10

    申请号：EP84201130.6

    申请日：1984-08-01

    申请人： Philips Norden AB ,  Philips Electronics N.V.

    发明人： Akerlund, Mats Peter ,  Strömbäck, Ture Johannes

    IPC分类号： H03M1/06 ,  H03M1/66

    CPC分类号： H03M1/0881

    摘要： The invention relates to a device for eliminating stray pulses occuring on the output of a digital-to-analogue converter DA. The pulses may be caused by, for example, insufficient synchronism in the input data bits and may be predicted in time. According to the invention an inductor L is arranged between the output of the digital-to-analogue converter and a following circuit F, for example a deflecting amplifier for random scan displays, and a switch S2 is arranged between the said output and ground which switch when a pulse is predicted to occur shortcircuits the output of the digital-to-analogue converter to ground. Hereby an eliminating device of simple and cheap construction is obtained operating at high frequencies.