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2.发明授权Circuit de traitement de signaux comportant un étage d'entrée à gain variable 失效电路，用于包括具有可变增益输入级处理信号
公开(公告)号：EP0631395B1
公开(公告)日：1999-03-24
申请号：EP94109610.9
申请日：1994-06-22
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公开(公告)号：EP1976127A4
公开(公告)日：2009-03-25
申请号：EP06833619
申请日：2006-11-29
申请人： PIONEER CORP
发明人： YAMAMOTO YUJI
CPC分类号： H03F3/2175 , H03M3/482 , H03M3/49 , H03M3/492
摘要： A digital reception device includes a band pass type delta sigma A/D converter for performing analog-digital conversion for converting a signal to be modulated in an analog region into a signal in the digital region. It is possible to reduce the thermal noise and power consumption of the band pass type delta signal A/D converter. The digital reception device includes a signal level detection unit (9a) for detecting the level of the IF signal SIF and a current control unit (10) for adjusting, according to the detection result DETa, operation current of a calculation amplifier as delay means as one of the components of a switched capacitor filter (7b) arranged in the band pass type delta sigma A/D converter (7). As the electric field intensity induced by an antenna (1) becomes smaller and the level of the IF signal SIF becomes lower, the operation current of the calculation amplifier is made smaller so as to reduce power consumption. As the electric field intensity induced by the antenna (1) becomes greater and the level of the IF signal SIF becomes greater, the operation current of the calculation amplifier is made greater so as to reduce the thermal noise.
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4.发明公开Circuit de traitement de signaux comportant un étage d'entrée à gain variable 失效电路，用于包括具有可变增益输入级处理信号。
公开(公告)号：EP0631395A1
公开(公告)日：1994-12-28
申请号：EP94109610.9
申请日：1994-06-22
摘要： L'invention concerne un circuit de traitement (2,120) pour produire un signal de sortie variable en réponse à une grandeur variable captée ou reçue en entrée. Le circuit de traitement est associé à un étage ou a un capteur d'entrée (4,110) fournissant un signal avec un facteur d'amplification/atténuation variable et présentant en outre des caractéristiques de réponse qui dépendent notamment de variables d'état. Le circuit de traitement comporte des moyens (fig.5 ,fig.6) de suppression des transitoires normalement produites par une modification du facteur d'amplification/atténuation, les moyens de suppression des transitoires fonctionnant en modifiant la valeur des variables d'état en proportion directe de la modification du facteur d'amplification/atténuation.
摘要翻译： 本发明涉及用于响应产生可变输出信号的处理电路（2，120）的可变数量拾起或在输入端接收。 该处理电路被用一个阶段或与输入传感器（4，110）供给具有可变放大/衰减因子的信号超过相关联的，更多的，，呈现出对状态变量尤其取决于响应特性。 所述处理电路包括装置（图5，图6）用于抑制通常是由放大/衰减因子的修饰而产生的瞬变，瞬变抑制装置通过修改状态变量的值成正比例的变形操作 的放大/衰减系数。
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公开(公告)号：EP1855384A1
公开(公告)日：2007-11-14
申请号：EP07075367.8
申请日：2003-09-26
IPC分类号： H03M3/02
摘要： A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [-a,+a]. An accumulator stage produces an accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y 0 (n) representing the accumulated signal. Based on the quantized digital signal y 0 (n), a adaptation stage produces a digital output signal z 0 (n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.
摘要翻译： 用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ A，+ A]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级变换差分信号的累加，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其通过数模转换器级转换成模拟反馈信号z（n）。
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公开(公告)号：EP1254518A1
公开(公告)日：2002-11-06
申请号：EP00909155.4
申请日：2000-02-11
申请人： Georg Neumann GmbH
发明人： KERN, Otmar
IPC分类号： H03M1/18
摘要： The invention relates to a method for converting an analogous input signal (S1) into a digital output signal (S7). The analogous input signal (S1) is amplified in a first signal path (2, 3, 5) and is subject to an analog-to-digital conversion (5). An additional analogous signal (S4) is obtained in a second signal path (4, 6) for transmitting greater signal amplitudes. Said signal (S4) is subject to an analog-to-digital conversion (6). The signal (S5) that is digitised in the first signal path (2, 3, 5) and the signal (S6) that is digitised in the second signal path (4, 6) are supplied to a digital signal processor (7) which generates the digital output signal (S7). The aim of the invention is to prevent abrupt reduction of the signal resolution and to obtain a dynamic range that is as high as possible. The analogous signal that is supplied to the second signal path (4, 6) is distorted in a non-linear manner and in an opposite direction in relation to the reinforced analogous signal (S2) in the first signal path (2, 3, 5). The differential amplification of the first and second signal path thus increases above a pre-determined threshold and when the signal amplitude increases. An undistorted output signal (S7) is thus produced after the distorted partial signals have been put together.
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公开(公告)号：EP2647129A1
公开(公告)日：2013-10-09
申请号：EP11794323.3
申请日：2011-11-28
发明人： LEE, Chong U. , REZNIK, Yuriy , HONG, John H.
摘要： In general, techniques are described for performing enhanced sigma-delta modulation. For example, an apparatus comprising a predictive filter unit, an amplifier, an oversampling unit and a sigma-delta modulation unit may implement the techniques. The predictive filter unit performs predictive filtering on an input signal to generate a filtered signal and computes an estimate of a predictive gain as a function of an energy of the input signal and an energy of the filtered signal. The amplifier receives the filtered signal and amplifies the filtered signal based on the predictive gain to generate an amplified signal. The oversampling unit receives the amplifies signal and performs oversampling in accordance with an oversampling rate to generate an oversampled signal. The sigma-delta modulation unit receives the oversampled signal and performs sigma-delta modulation to generate a modulated signal.
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公开(公告)号：EP1743429A1
公开(公告)日：2007-01-17
申请号：EP05715164.9
申请日：2005-04-11
申请人： Audioasics A/S
发明人： THOMSEN, Henrik
摘要： A method of controlling a sigma delta modulator with a loop which establishes a signal transfer function, STF, and a quantization noise transfer function, NTF, of the sigma delta modulator, wherein the sigma delta modulator receives an input signal, x(n), and provides a modulated output signal, y(n) in response to the input signal. The method is characterized in comprising the step of controlling the sigma delta modulator to change the quantization noise transfer function, NTF, in response to a signal feature, A(n), which is correlated with the input signal.
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公开(公告)号：EP1665544A1
公开(公告)日：2006-06-07
申请号：EP03758484.4
申请日：2003-09-26
IPC分类号： H03M3/02
摘要： A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [-a, +a]. An accumulator stage produces an accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal yo(n) representing the accumulated signal. Based on the quantized digital signal yo(n), a adaptation stage produces a digital output signal zo(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.
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公开(公告)号：EP1665544B1
公开(公告)日：2008-11-05
申请号：EP03758484.4
申请日：2003-09-26
IPC分类号： H03M3/02
摘要： A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [-a, +a]. An accumulator stage produces an accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal yo(n) representing the accumulated signal. Based on the quantized digital signal yo(n), a adaptation stage produces a digital output signal zo(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.
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